IP Library › Granted Patent US 10,319,067
Granted Patent B2
US 10,319,067 · App. 15/310,186 · Granted Jun 11, 2019

Sensor module, method of controlling the same, and electronic apparatus

Inventors: Hiroshi Sumihiro (Kanagawa, JP); Koji Enoki (Kanagawa, JP)
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
G06T1/60G06F3/0604G06F3/0659G06F3/0683G06F9/00G06F9/30G11C7/1048H04N5/907
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Quick Facts
Patent No.
US 10,319,067
App. No.
15/310,186
Granted
Jun 11, 2019
Kind
B2
Abstract

A sensor module of the present disclosure includes a sensor section; a memory section having a plurality of memory regions; an arithmetic operation section that performs a predetermined arithmetic operation while accessing the memory section on a basis of a detection result of the sensor section; and a memory control section that controls the memory section to start access to the memory regions at different timings.

Claims (59)

1. A sensor module, comprising:

a sensor section;

a memory section having a plurality of memory regions grouped into a plurality of memory groups,

wherein a determined number of the memory regions belong to each memory group of the plurality of memory groups;

an arithmetic operation section configured to:

perform an arithmetic operation based on a detection result of the sensor section; and

access the memory section while performing the arithmetic operation; and

a memory control section comprising:

at least a first delay section; and

a second delay section,

wherein a delay amount of the second delay section is different from a delay amount of the first delay section,

wherein the memory control section is configured to:

control the memory section to start access to the plurality of memory regions at different timings;

supply a control command to a first memory group of the plurality of memory groups through the first delay section; and

supply the control command to a second memory group of the plurality of memory groups through the second delay section.

2. The sensor module according to claim 1 ,

wherein the memory control section further comprises:

a third delay section; and

a fourth delay section,

wherein a delay amount of the fourth delay section is different from a delay amount of the third delay section,

wherein the memory control section is further configured to:

receive a first read data from the first memory group through the third delay section; and

receive a second read data from the second memory group through the fourth delay section,

wherein a first sum of the delay amount of the first delay section and the delay amount of the third delay section is equal to a second sum of the delay amount of the second delay section and the delay amount of the fourth delay section.

3. The sensor module according to claim 1 , wherein

each memory region of the plurality of memory regions comprises a plurality of memory cells,

the arithmetic operation section is further configured to intermittently access each memory cell of the plurality of memory cells, and

based on access of each memory cell by the arithmetic operation section, the memory control section is further configured to restore data stored in a memory cell accessed by the arithmetic operation section.

4. The sensor module according to claim 3 , wherein the arithmetic operation section is further configured to intermittently read each memory cell of the plurality of memory cells.

5. The sensor module according to claim 1 , wherein

each memory region of the plurality of memory regions comprises a plurality of memory cells, and

the memory control section is further configured to intermittently restore data stored in each memory cell of the plurality of memory cells.

6. The sensor module according to claim 1 , wherein the sensor section is an image sensor.

7. A method of controlling a sensor module, comprising:

performing an arithmetic operation based on a detection result of a sensor section;

accessing a memory section when performing the arithmetic operation,

wherein the memory section comprises a plurality of memory regions grouped into a plurality of memory groups, and

wherein a determined number of the memory regions belong to each memory group of the plurality of memory groups;

controlling the memory section to start access to the plurality of memory regions at different timings;

supplying a control command to a first memory group of the plurality of memory groups through a first delay section; and

supplying the control command to a second memory group of the plurality of memory groups through a second delay section,

wherein a delay amount of the first delay section is different from a delay amount of the second delay section.

8. An electronic apparatus, comprising:

a sensor module; and

a control section configured to control the sensor module, the sensor module comprising:

a sensor section;

a memory section having a plurality of memory regions grouped into a plurality of memory groups,

wherein a determined number of the memory regions belong to each memory group of the plurality of memory groups;

an arithmetic operation section configured to:

perform an arithmetic operation based on a detection result of the sensor section; and

access the memory section when performing the arithmetic operation; and

a memory control section comprising:

at least a first delay section; and

a second delay section,

wherein a delay amount of the second delay section is different from a delay amount of the first delay section,

wherein the memory control section is configured to:

control the memory section to start access to the plurality of memory regions at different timings;

supply a control command to a first memory group of the plurality of memory groups through the first delay section; and

supply the control command to a second memory group of the plurality of memory groups through the second delay section.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2017
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 042993/0713 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2016
From: SUMIHIRO, HIROSHI; ENOKI, KOJI
To: SONY CORPORATION
Reel/Frame 040585/0318 →
Priority Claims (1)
JP 2014-105137 · May 21, 2014 · national
Continuity (1)
Related Publication 20170148133A1 · May 25, 2017