Determining a resistance state of a cell in a crossbar memory array

1. A method for determining a resistance state of a cell in a crossbar memory array, said method comprising:

applying, by a dual-sensing circuit, a first read voltage across a cell to sense a first cell current;

applying a second read voltage across the cell to sense a second cell current;

identifying and amplifying a difference value between the first cell current and the second cell current;

reading a low resistance state for the cell in response to the amplified difference value being above a predetermined high threshold; and

reading a high resistance state for the cell in response to the amplified difference value being below a predetermined low threshold.

2. The method of claim 1 , wherein the first read voltage is lower than the second read voltage.

3. The method of claim 2 , wherein the second read voltage is lower than a write voltage for the cell.

4. The method of claim 1 , wherein the cell further includes a selector in series with the cell, the selector including a threshold voltage (Vth) to provide non-linearity to the cell.

5. The method of claim 4 , wherein the first read voltage and the second read voltage are within a close predetermined range of each other, and wherein each of the first read voltage and the second read voltage is sufficiently high to induce a voltage drop on the cell that exceeds the selector threshold voltage and is sufficiently low to not cause the cell to switch to a different state.

6. The method of claim 1 , wherein the cell is a memristor device that is to switch between an ON state with a low resistance and to an OFF state with a high resistance.

7. The method of claim 6 , wherein the memristor device includes a matrix material containing mobile dopants that are to be moved within the matrix material to dynamically alter the electrical resistance of the memristor device, wherein locations and characteristics of the mobile dopants remain stable until an application of a programming electrical field.

8. A data storage system to determine a resistance state of a cell in a crossbar memory array, comprising:

a processor;

a memory storing machine readable instructions that are to cause the processor to:

apply a first read voltage across a cell to measure a first cell current;

apply a second read voltage across the cell to measure a second cell current, wherein the first read voltage is lower than the second read voltage;

identify and amplify a difference value between the first cell current and the second cell current;

read a low resistance state for the cell in response to the amplified difference value being above a predetermined high threshold value; and

read a high resistance state for the cell in response to the amplified difference value being below a predetermined low threshold value.

9. The data storage system of claim 8 , wherein the machine readable instructions are to cause the processor to provide non-linearity to the cell to reduce leakage or sneak current across a conductor of the crossbar memory array.

10. A system, comprising a dual-sensing circuit to:

receive a first read voltage across a cell to measure a first cell current;

receive a second read voltage across the cell to measure a second cell current, wherein the first read voltage is lower than the second read voltage and the second voltage is lower than a write voltage;

determine a difference value between the first cell current and the second cell current;

amplify the difference value;

read a low resistance state for the cell in response to the amplified difference value exceeding a predetermined high threshold value; and

read a high resistance state for the cell in response to the amplified difference value falling below a predetermined low threshold value.

11. The system of claim 10 , wherein the cell further includes a selector in series with the cell, the selector including a threshold voltage (Vth) to provide non-linearity to the cell.