Semiconductor device

1. A semiconductor device comprising:

a substrate;

a semiconductor layer disposed on the substrate;

a first transistor including a first gate electrode, a plurality of first drain electrodes and a plurality of first source electrodes that are disposed vertically above the semiconductor layer;

a second transistor including a second gate electrode, a plurality of second drain electrodes and a plurality of second source electrodes that are disposed vertically above the semiconductor layer;

first drain pads that are disposed vertically above the first drain electrodes, are electrically connected to the first drain electrodes, and extend in a first direction;

a plurality of first source pads that are disposed vertically above the second source electrodes, are electrically connected to the second source electrodes, and extend along the first direction;

a plurality of first common interconnects, each of which is continuously disposed from vertically above one of the first source electrodes to vertically above one of the second drain electrodes, is electrically connected to the one of the first source electrodes and the one of the second drain electrodes, and extends in the first direction; and

a plurality of second common interconnects, each of which is connected to the first common interconnects, and extends in a second direction that intersects with the first direction,

wherein the plurality of first common interconnects and the plurality of second common interconnects are disposed in a same layer, and

wherein each of the plurality of second common interconnects is directly connected to the first common interconnects.

2. The semiconductor device according to claim 1 ,

wherein the plurality of first source pads are each disposed between an adjacent pair of the plurality of second common interconnects.

3. The semiconductor device according to claim 1 ,

wherein the plurality of first common interconnects include a first vertical interconnect, a second vertical interconnect and a third vertical interconnect,

the plurality of second common interconnects include a first horizontal interconnect, a second horizontal interconnect and a third horizontal interconnect,

the first vertical interconnect and the second vertical interconnect are connected by the first horizontal interconnect and the second horizontal interconnect,

the second vertical interconnect and the third vertical interconnect are connected by the third horizontal interconnect, and

the third horizontal interconnect is, as viewed in plan view, disposed in a position between the first horizontal interconnect and the second horizontal interconnect in the first direction.

4. The semiconductor device according to claim 3 ,

wherein the first vertical interconnect, the second vertical interconnect and the third vertical interconnect are disposed adjacent to each other, and

the first horizontal interconnect, the second horizontal interconnect and the third horizontal interconnect are disposed adjacent to each other.

5. The semiconductor device according to claim 1 ,

wherein a plurality of second source interconnects and a plurality of second drain interconnects that extend in the second direction are disposed vertically above the second transistor and below the plurality of first common interconnects.

6. The semiconductor device according to claim 5 ,

wherein the plurality of second common interconnects cover a part of the plurality of second source interconnects and a part of the plurality of second drain interconnects.

7. The semiconductor device according to claim 1 , further comprising

an insulating film that is disposed vertically above the plurality of first source pads and vertically above the plurality of second common interconnects,

wherein the insulating film has a plurality of openings that partially expose the plurality of first source pads and the plurality of second common interconnects.

8. The semiconductor device according to claim 1 , further comprising

a mounting circuit substrate,

wherein the mounting circuit substrate includes:

at least one first via hole opening;

a plurality of first metal plane layers for flip-chip mounting that are electrically connected to the plurality of first common interconnects; and

a third common interconnect that is electrically connected to the first metal plane layers via a via hole formed within the at least one first via hole opening.

9. The semiconductor device according to claim 1 , further comprising

a mounting circuit substrate,

wherein the mounting circuit substrate includes:

at least one second via hole opening;

a plurality of second metal plane layers for flip-chip mounting that are electrically connected to the plurality of first source pads; and

a fourth common interconnect that is electrically connected to the second metal plane layers via a via hole formed within the at least one second via hole opening.

10. The semiconductor device according to claim 1 , further comprising

a mounting circuit substrate,

wherein the mounting circuit substrate includes:

at least one third via hole opening;

a plurality of third metal plane layers for flip-chip mounting that are electrically connected to the plurality of first source pads; and

a fifth common interconnect that is electrically connected to the third metal plane layers via a via hole formed within the at least one third via hole opening.

11. The semiconductor device according to claim 1 ,

wherein the semiconductor layer includes a nitride semiconductor.

12. The semiconductor device according to claim 1 , wherein the plurality of second common interconnects and the first common interconnect are disposed in a same layer.