IP Library Granted Patent US 9,905,602
Granted Patent B2
US 9,905,602 · App. 15/335,320 · Granted Feb 27, 2018

Semiconductor apparatus, method of manufacturing semiconductor apparatus, method of designing semiconductor apparatus, and electronic apparatus

Inventors: Hiroshi Takahashi (Kanagawa, JP); Shunichi Sukegawa (Kanagawa, JP); Keishi Inoue (Kanagawa, JP)
Assignee: Sony Corporation
H01L27/14634H01L21/76802H01L21/76898H01L23/481H01L27/1464H01L27/1469H01L27/14621H01L27/14627H01L27/14632H01L27/14636H01L27/14638H01L27/14645H01L31/02002H01L23/5283H01L23/535H01L24/05H01L31/02008H01L31/02013H01L2224/02166H01L2224/04042H01L2224/08145H01L2224/24147H01L2224/48463H01L2224/80896H01L2224/9202H01L2924/12043H01L2924/1306H01L2924/13091H01L2924/14H01L2924/3025
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Quick Facts
Patent No.
US 9,905,602
App. No.
15/335,320
Granted
Feb 27, 2018
Kind
B2
Abstract

A semiconductor device including a first material layer adjacent to a second material layer, a first via passing through the first material layer and extending into the second material layer, and a second via extending into the first material layer, where along a common cross section parallel to an interface between the two material layers, the first via has a cross section larger than that of the second via.

Claims (36)

1. A semiconductor device, comprising:

a first semiconductor chip including a plurality of photoelectric conversion elements and a first multi wiring layer;

a second semiconductor chip including a second multi wiring layer,

wherein the first semiconductor chip and the second semiconductor chip are bonded to each other with the first multi wiring layer facing the second multi wiring layer;

a connection conductor, wherein a wiring of the first multi layer wiring and a wiring of the second multi layer wiring electrically connect the first multi wiring layer to the second multi wiring layer through a first conductive portion and a second conductive portion, and wherein the second conductive portion comprises Cu and Al.

2. The semiconductor device of claim 1 , further comprising: a barrier metal layer within the second conductive portion.

3. The semiconductor device of claim 2 , wherein the barrier metal layer comprises TiN.

4. The semiconductor device of claim 1 , wherein a size of the second conductive portion is different from that of the first conductive portion.

5. The semiconductor device of claim 4 ,

wherein a diameter of the second conductive portion is different from a diameter of the first conductive portion.

6. The semiconductor device of claim 1 ,

wherein the second conductive portion has a diameter that is different than a diameter of the first conductive portion along a common cross section parallel to an interface between the first semiconductor chip and the second semiconductor chip.

7. The semiconductor device of claim 1 ,

wherein the device is a backside illuminated device.

8. The semiconductor device of claim 1 , wherein the plurality of photoelectric conversion elements are arranged in a two-dimensional array.

9. The semiconductor device of claim 8 , wherein the connection conductor is within an area of the two-dimensional array.

10. A semiconductor device, comprising:

a first semiconductor chip including a plurality of photoelectric conversion elements and a first multi wiring layer;

a second semiconductor chip including a second multi wiring layer,

wherein the first semiconductor chip and the second semiconductor chip are bonded to each other with the first multi wiring layer facing the second multi wiring layer;

a connection conductor, wherein the wiring of the first multi layer wiring and the wiring of the second multi layer wiring electrically connect the first multi wiring layer to the second multi wiring layer through a first conductive portion and a second conductive portion,

a bonding wire,

wherein the bonding wire connects an electrode pad portion to an external wiring, and

wherein the second conductive portion and the electrode pad portion comprise the same material.

11. The semiconductor device of claim 10 , wherein the second conductive portion and the electrode pad portion comprise Al.

12. The semiconductor device of claim 10 , wherein the second conductive portion and the electrode pad portion has a barrier metal layer.

13. The semiconductor device of claim 12 , wherein the barrier metal layer comprises TiN.

14. The semiconductor device of claim 10 , wherein a size of the second conductive portion is different from that of the first conductive portion.

15. The semiconductor device of claim 10 ,

wherein a diameter of the second conductive portion is different from a diameter of the first conductive portion.

16. The semiconductor device of claim 10 ,

wherein the second conductive portion has a diameter that is different than a diameter of the first conductive portion along a common cross section parallel to an interface between the first semiconductor chip and the second semiconductor chip.

17. The semiconductor device of claim 10 ,

wherein the device is a backside illuminated device.

18. The semiconductor device of claim 10 , wherein the plurality of photoelectric conversion elements are arranged in a two-dimensional array.

19. The semiconductor device of claim 18 , wherein the connection conductor is within an area of the two-dimensional array.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2021
From: TAKAHASHI, HIROSHI; SUKEGAWA, SHUNICHI; INOUE, KEISHI
To: SONY CORPORATION
Reel/Frame 056528/0215 →
Priority Claims (1)
JP 2010-070925 · Mar 25, 2010 · national
Continuity (5)
Continuation 14995072 · Jan 13, 2016
Continuation 14587800 · Dec 31, 2014
Continuation 13962711 · Aug 8, 2013
Continuation 13050338 · Mar 17, 2011
Related Publication 20170047369A1 · Feb 16, 2017