Forming on-chip metal-insulator-semiconductor capacitor

1. A method for forming a metal-insulator-semiconductor (MIS) capacitor on a semiconductor substrate, the method comprising:

forming a plurality of fins on a first region of the semiconductor substrate;

forming a bi-polymer structure;

selectively removing the first polymer of the bi-polymer structure;

forming deep trenches in the semiconductor substrate resulting in pillars in a second region of the semiconductor structure, the deep trenches filled with oxide;

selectively removing the second polymer of the bi-polymer structure;

doping the pillars; and

depositing a high-k metal gate (HKMG) over the first and second regions to form the MIS capacitor in the second region of the semiconductor substrate,

wherein the oxide is recessed to expose a top surface of the pillars in the second region of the semiconductor substrate;

wherein a first spacer is applied over the pillars and within troughs of the plurality of fins; and

wherein a first mask is applied over the plurality of fins, the first spacer is etched from the second region of the semiconductor substrate, and the oxide is removed from the troughs defined between the pillars.

2. The method of claim 1 , further comprising depositing a directed self-assembly (DSA) co-polymer to form the bi-polymer structure by anneal.

3. The method of claim 1 , wherein the first mask is stripped after doping the pillars and before depositing the HKMG over the pillars.

4. The method of claim 3 , wherein a second mask is applied and a portion of the HKMG is etched to form a recess between the first and second regions of the semiconductor substrate.

5. The method of claim 4 , wherein the second mask is stripped, the recess is filled with an oxide, the HKMG is recessed, and a second spacer is applied over exposed regions of the HKMG.

6. The method of claim 5 , wherein epitaxial growth is performed over exposed regions of the plurality of fins on the first region of the semiconductor substrate.