Electrostatically enhanced fins field effect transistors
View Patent ↗Non-planar semiconductor devices including semiconductor fins or stacked semiconductor nanowires that are electrostatically enhanced are provided. The electrostatic enhancement is achieved in the present application by epitaxially growing a semiconductor material protruding portion on exposed sidewalls of alternating semiconductor material portions of at least one hard mask capped semiconductor-containing fin structure that is formed on a substrate.
1. A semiconductor structure comprising:
a semiconductor-containing fin structure located on a surface of a base layer, wherein said semiconductor-containing fin structure comprises, from bottom to top, and in an alternating manner, at least one first semiconductor material portion, and at least one second semiconductor material portion, wherein said at least one second semiconductor material portion has a width that is less than a width of said at least one first semiconductor material portion;
an oxide cap portion located on a sidewall of said at least one second semiconductor material portion, wherein a sidewall surface of said oxide cap portion is vertically coincident with a sidewall surface of said at least one first semiconductor material portion; and
a semiconductor material protruding portion located on said sidewall surface of said at least one first semiconductor material portion.
2. The semiconductor structure of claim 1 , wherein said semiconductor material protruding portion has a shape of a triangular and wherein a base of said triangular is formed directly on said exposed semiconductor sidewall surface of said least one first semiconductor material portion.
3. The semiconductor structure of claim 1 , wherein a topmost surface of said at least one first semiconductor material portion is in direct physical contact with a bottommost surface of said at least one second semiconductor material portion.
4. The semiconductor structure of claim 1 , further comprising a functional gate structure surrounding said semiconductor-containing fin structure.
5. The semiconductor structure of claim 1 , wherein said at least one first semiconductor material portion is composed of a different semiconductor material than said at least one second semiconductor material portion.
6. The semiconductor structure of claim 1 , wherein said at least one first semiconductor material portion is composed of a semiconductor material that has a slower oxidation rate than a semiconductor material that provides the at least one second semiconductor material portion.
7. The semiconductor structure of claim 6 , wherein said at least one first semiconductor material portion is composed of Si 1-x Ge x wherein x is 0 to less than 1, and said at least one second semiconductor material portion is composed of Si 1-y Ge y wherein y is from 0.1 to 1.
8. The semiconductor structure of claim 1 , wherein said at least one first semiconductor material portion comprises a plurality of first semiconductor material portions, and said at least one second semiconductor material portion comprises a plurality of second semiconductor material portions.
9. The semiconductor structure of claim 1 , wherein said base layer is composed of a semiconductor material, an insulator layer or a multilayered stack of a semiconductor material and an insulator layer.
10. The semiconductor structure of claim 1 , further comprising a hard mask cap located atop said semiconductor-containing fin structure.
11. The semiconductor structure of claim 1 , wherein said base layer has a concave upper surface located adjacent each side of said semiconductor-containing fin structure.