IP Library Granted Patent US 10,255,876
Granted Patent B2
US 10,255,876 · App. 15/362,593 · Granted Apr 9, 2019

System and method for display auto-correction impedance mismatch control

Inventors: Ching-Wei Chang (New Taipei, TW); I-Yu Chen (Taipei, TW)
Assignee: Dell Products, LP
G09G5/006G06T1/20G09G2330/08G09G2330/12H04L25/02
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Quick Facts
Patent No.
US 10,255,876
App. No.
15/362,593
Granted
Apr 9, 2019
Kind
B2
Abstract

A method and information handling system including a display device connector for connecting to a digital display device, a controller executing instructions of an impedance mismatch control system for determining impedance differences along an operative connection from the display device connector to the digital display device, where the controller receives a display device connector impedance measurement and a second impedance measurement from a point further along the operative connection between the display device connector and the digital display device, and the controller executes the impedance mismatch control system to determine an impedance mismatch exists from the impedance difference between the display device connector and the point further along the operative connection between the display device connector and the digital display device.

Claims (46)

1. An information handling system comprising:

a display device connector for connecting to a digital display device;

a controller executing instructions of an impedance mismatch control system for determining impedance differences along an operative connection from the display device connector to the digital display device;

the controller receiving a display device connector first impedance measurement to detect impedance level of a motherboard and the display device connector of the information handling system and a second impedance measurement from a point further along the operative connection between the display device connector and the digital display device to detect impedance level of a currently-connected display control board and display cable or display trace; and

the controller executing the impedance mismatch control system to determine an impedance mismatch level by determining that the impedance difference between the display device connector and the point further along the operative connection between the display device connector and the digital display device exceeds an impedance mismatch variance threshold level.

2. The information handling system of claim 1 further comprising:

the controller transmitting a signal to adjust impedance via an impedance adjustment circuit.

3. The information handling system of claim 1 wherein the impedance mismatch variance threshold level is a difference of the display device connector impedance at +/−5% of the second impedence measurement.

4. The information handling system of claim 1 wherein the second impedance measurement from the point further along the operative connection between the display device connector and the digital display device is a digital display device connector cable impedance measurement.

5. The information handling system of claim 1 wherein the second impedance measurement from the point further along the operative connection between the display device connector and the digital display device is a digital display device control board impedance measurement.

6. The information handling system of claim 1 further comprising:

an impedance adjustment circuit including a variable capacitor and at least one inductor in parallel; and

the controller transmitting a signal to adjust the variable capacitor to adjust the first impedance of the digital display connector.

7. The information handling system of claim 1 further comprising:

a directional coupler for measuring trace first impedance from the digital display connector.

8. A computerized method of impedance mismatch control for a display device connector in an information handling system comprising:

executing instructions, via a controller, of an impedance mismatch control system for determining impedance differences along an operative connection from the display device connector to a digital display device;

measuring a first impedance from a point further along the operative connection between the display device connector and the digital display device operatively connected to the information handling system to detect impedance level of a currently-connected display control board and display cable or display trace;

measuring a second impedance of the display device connector device of the information handling system to detect impedance level of a motherboard and the display device connector;

determining an impedance mismatch between the first impedance and the second impedance; and

in response to determining the impedance mismatch, sending an adjustment signal to an impedance adjustment circuit to adjust the second impedance of the display device connector device.

9. The computerized method of claim 8 further comprising:

sending the adjustment signal to adjust capacitance of a variable capacitor of the impedance adjustment circuit when the impedance mismatch is determined by the impedance mismatch control system.

10. The computerized method of claim 8 further comprising:

sending the adjustment signal to decrease capacitance at a variable capacitor when the measured impedance of the display device connector is greater than an impedance mismatch variance threshold level above the second impedance measurement, wherein the variable capacitor is in parallel with an inductor of the impedance adjustment circuit.

11. The computerized method of claim 8 further comprising:

sending the adjustment signal to increase capacitance at a variable capacitor when the measured second impedance of the display device connector is greater than a impedance mismatch variance threshold level below the first impedance measurement, wherein the variable capacitor is in parallel with an inductor of the impedance adjustment circuit.

12. The computerized method of claim 8 further comprising:

sending the adjustment signal to increase capacitance at a variable capacitor when the measured second impedance of the display device connector is greater than an impedance mismatch variance threshold level above the first impedance measurement, wherein the variable capacitor is in series with an inductor of the impedance adjustment circuit.

13. The computerized method of claim 8 further comprising:

sending the adjustment signal to decrease capacitance at a variable capacitor when the measured second impedance of the display device connector is greater than an impedance mismatch variance threshold level below the first impedance measurement, wherein the variable capacitor is in series with an inductor of the impedance adjustment circuit.

14. The computerized method of claim 8 further comprising:

sending the adjustment signal to adjust inductance of a variable inductor when the impedance mismatch is determined by the impedance mismatch control system.

15. The computerized method of claim 8 wherein the first impedance is measured from a digital display device connector cable operatively connected to the display device connector.

16. An information handling system comprising:

a display device connector for connecting to a digital display device;

a controller executing instructions of an impedance mismatch control system for determining impedance differences along an operative connection from the display device connector to the digital display device;

the controller receiving a first impedance measurement from a digital display device connector cable operatively connected to the display device connector to detect impedance level of the digital display device connector cable and a display device connector second impedance measurement of the display device connector to detect impedance level of a motherboard and the display device connector; and

the controller executing the impedance mismatch control system to determine an impedance mismatch from a difference between the display device connector second impedance measurement and the first impedance measurement that exceeds an impedance mismatch variance threshold level.

17. The information handling system of claim 16 further comprising:

an impedance adjustment circuit adjusting the impedance of the display device connector device in response to determining the impedance mismatch.

18. The information handling system of claim 16 wherein the impedance mismatch variance threshold level is +/−5% of the first impedance measurement.

19. The information handling system of claim 16 further comprising:

the controller sending a signal to increase capacitance at a variable capacitor when the measured second impedance of the display device connector is greater than the impedance mismatch variance threshold level below the first impedance measurement, wherein the variable capacitor is in parallel with an inductor of an impedance adjustment circuit.

20. The information handling system of claim 16 further comprising:

the controller sending a signal to decrease capacitance at a variable capacitor when the measured second impedance of the display device connector is greater than the impedance mismatch variance threshold level above the first impedance measurement, wherein the variable capacitor is in parallel with an inductor of an impedance adjustment circuit.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (050724/0466) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 060753/0486 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (041829/0873) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0724 →
RELEASE OF SECURITY INTEREST AT REEL 041808 FRAME 0516 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL INTERNATIONAL, L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058297/0573 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Oct 15, 2019
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 050724/0466 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY INTEREST (NOTES) Recorded Feb 28, 2017
From: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 041829/0873 →
PATENT SECURITY INTEREST (CREDIT) Recorded Feb 24, 2017
From: DELL INTERNATIONAL, L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 041808/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2016
From: CHANG, CHING-WEI; CHEN, I-YU
To: DELL PRODUCTS, LP
Reel/Frame 040434/0950 →
Continuity (1)
Related Publication 20180151151A1 · May 31, 2018
Cited By (1)
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