Chip packaging module
The present disclosure discloses a chip packaging module, including: a first chip, where a first pad is disposed on a side neighboring to a front surface of the first chip; at least a second chip, where at least one second chip is disposed on a rear side of the first chip, each second chip has a second pad, and wherein the first pad of the first chip is connected to the second pad of the second chip via a redistribution layer. According to the chip packaging module in the present disclosure, a second chip is disposed on a rear side of a first chip, and a first pad is connected to a second pad via a redistribution layer. By means of a redistribution technology on surfaces of multiple chips, a lead of a pad on a front surface of a fingerprint recognition chip is masterly winded to the back for interconnection, so that an induction area on the front surface of the chip can fully contact with a human body. In addition, the multi-chip redistribution technology can also greatly narrow down an interconnection distance between chips, which improves efficiency of communication between chips.
1. A chip packaging module, comprising:
a first chip, wherein a first pad is disposed on a side neighboring to a front surface of the first chip; and
at least a second chip, wherein at least one second chip is disposed on a rear side of the first chip, each second chip has a second pad, and wherein the first pad of the first chip is connected to the second pad of the second chip via a redistribution layer;
wherein a first recess portion is formed on the front surface of the first chip, and an end of the redistribution layer extends to a bottom wall of the first recess portion.
2. The chip packaging module according to claim 1 , wherein a second recess portion that recesses forward is formed on a rear surface of the first chip, and the second chip is disposed in the second recess portion.
3. The chip packaging module according to claim 2 , wherein the first chip is a fingerprint recognition chip.
4. The chip packaging module according to claim 1 , wherein a rear surface of the first chip is provided with a planarization medium layer.
5. The chip packaging module according to claim 4 , wherein the planarization medium layer is an organic resin layer or an inorganic silicide layer.
6. The chip packaging module according to claim 1 , wherein the first pad is disposed neighboring to the front surface of the first chip, or is exposed from the front surface of the first chip.
7. The chip packaging module according to claim 1 , wherein the redistribution layer is directly connected to the first pad.
8. The chip packaging module according to claim 1 , wherein a side surface of the first chip is shaped into a slope that inclines from front to back, and wherein the redistribution layer extends along the slope in a front-to-back direction.
9. The chip packaging module according to claim 1 , wherein a rear surface of the first chip is provided with a groove, and an inner wall of the groove has an insulation layer,
wherein at least one second chip is disposed in the groove, and a rear surface of the second chip contacts with a bottom wall of the groove.