Transistor, circuit, semiconductor device, display device, and electronic device
A transistor in which a change in characteristics is small is provided. A circuit, a semiconductor device, a display device, or an electronic device in which a change in characteristics of the transistor is small is provided. The transistor includes an oxide semiconductor; a channel region is formed in the oxide semiconductor; the channel region contains indium, an element M, and zinc; the element M is one or more selected from aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium; a gate insulator contains silicon and oxygen whose atomic number is 1.5 times or more as large as the atomic number of silicon; the carrier density of the channel region is higher than or equal to 1×10 9 cm −3 and lower than or equal to 5×10 16 cm −3 ; and the energy gap of the channel region is higher than or equal to 2.7 eV and lower than or equal to 3.1 eV.
1. A transistor comprising:
an oxide semiconductor;
a gate insulator; and
a gate electrode,
wherein a channel region is formed in the oxide semiconductor,
wherein the channel region contains indium, an element M and zinc,
wherein the element M is one or more selected from aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium,
wherein the gate insulator contains silicon and oxygen,
wherein in the gate insulator, the number of oxygen atoms is 1.5 times or more as large as the number of silicon atoms,
wherein the carrier density of the channel region is higher than or equal to 1×10 9 cm −3 and lower than or equal to 5×10 16 cm −3 ,
wherein the energy gap of the channel region is higher than or equal to 2.7 eV and lower than or equal to 3.1 eV,
wherein the gate insulator has a defect state, and
wherein an energy difference between the defect state and the conduction band minimum of the channel region is 0.2 eV or more and 1.0 eV or less.
2. The transistor according to claim 1 ,
wherein the gate insulator is in contact with either an upper surface or a lower surface of the first region,
wherein the atomic proportions of the indium, the element M and the zinc are expressed by x, y, and z, respectively,
wherein x/(x+y+z) is greater than or equal to 0.33 and less than or equal to 0.7, and
wherein y/(x+y+z) is greater than or equal to 0.08 and less than or equal to 0.33.
3. The transistor according to claim 1 ,
wherein a channel length of the transistor is greater than or equal to 0.01 μm and less than or equal to 15 μm in a region, and
wherein a threshold value when a potential difference of 0.1 V or more and 30 V or less is applied between a drain and a source of the transistor is greater than or equal to −0.5 V and less than or equal to 2 V.
4. The transistor according to claim 3 , wherein the gate insulator comprises a region having a thickness greater than or equal to 5 nm and less than or equal to 200 nm.
5. A circuit comprising the transistor according to claim 1 , wherein voltage higher than or equal to −1 V and lower than or equal to 20 V is applied between the source and the gate electrode of the transistor.
6. A semiconductor device comprising the circuit according to claim 5 .
7. An electronic device comprising the semiconductor device according to claim 6 .
8. A display device comprising the electronic device according to claim 7 .
9. A display device comprising the circuit according to claim 5 , wherein the circuit is a gate driver of the display device.
10. The display device according to claim 8 , comprising any one or more of a touch sensor, a speaker, and an imaging device.
11. An electronic device comprising the display device according to claim 8 .
12. A transistor comprising:
a first oxide semiconductor;
a second oxide semiconductor;
a gate insulator; and
a gate electrode,
wherein the first oxide semiconductor comprises a first region,
wherein the second oxide semiconductor comprises a second region in contact with the first oxide semiconductor,
wherein the gate insulator comprises a region in contact with the second region,
wherein a channel region is formed in the first region,
wherein the first region and the second region contain indium, an element M, and zinc,
wherein the element M is one or more selected from aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium, wherein the gate insulator contains silicon and oxygen,
wherein in the gate insulator, the number of oxygen atoms is 1.5 times or more as large as the number of silicon atoms,
wherein the carrier density of the first region is higher than or equal to 1×10 9 cm −3 and lower than or equal to 5×10 16 cm −3 ,
wherein the energy gap of the first region is higher than or equal to 2.7 eV and lower than or equal to 3.1 eV, and
wherein the energy gap of the second region is larger than the energy gap of the first region by 0.15 eV or more and 2 eV or less.
13. The transistor according to claim 12 ,
wherein the atomic proportions of the indium, the element M, and the zinc contained in the first region are expressed by x1, y1, and z1, respectively,
wherein x1/(x1+y1+z1) is greater than or equal to 0.33 and less than or equal to 0.7, and
wherein y1/(x1+y1+z1) is greater than or equal to 0.08 and less than or equal to 0.33.
14. The transistor according to claim 12 ,
wherein the gate insulator has a trap state,
wherein an energy difference between the trap state and the conduction band minimum of the first region is 0.2 eV or more and 1.0 eV or less, and
wherein an energy difference between the trap state and the conduction band minimum of the second region is −0.2 eV or more and 0.8 eV or less.
15. The transistor according to claim 12 , wherein a thickness of the second region is greater than or equal to 1 nm and less than or equal to 20 nm.
16. The transistor according to claim 12 ,
wherein a channel length of the transistor is greater than or equal to 0.01 μm and less than or equal to 15 μm in a region, and
wherein a threshold value when a potential difference of 0.1 V or more and 30 V or less is applied between a drain and a source of the transistor is greater than or equal to −0.5 V and less than or equal to 2 V.
17. The transistor according to claim 16 , wherein the gate insulator comprises a region having a thickness greater than or equal to 5 nm and less than or equal to 200 nm.
18. A circuit comprising the transistor according to claim 12 , wherein voltage higher than equal to −1 V and lower than or equal to 20 V is applied between the source and the gate electrode of the transistor.
19. A semiconductor device comprising the circuit according to claim 18 .
20. An electronic device comprising the semiconductor device according to claim 19 .
21. A display device comprising the electronic device according to claim 20 .
22. A display device comprising the circuit according to claim 18 , wherein the circuit is a gate driver of the display device.
23. The display device according to claim 21 , comprising any one or more of a touch sensor, a speaker, and an imaging device.
24. An electronic device comprising the display device according to claim 21 .