IP Library › Granted Patent US 9,929,181
Granted Patent B2
US 9,929,181 · App. 15/375,277 · Granted Mar 27, 2018

Method for manufacturing an electronic device and method for operating an electronic device

Inventors: Thoralf Kautzsch (Dresden, DE); Alessia Scire (Dresden, DE); Steffen Bieselt (Wehlen, DE); Franz Hirler (Isen, DE); Anton Mauder (Kolbermoor, DE); Wolfgang Scholz (Olching, DE); Hans-Joachim Schulze (Taufkirchen, DE); Francisco Javier Santos Rodriguez (Villach, DE)
Assignee: Infineon Technologies Dresden GmbH
H01L27/1207H01L21/76283H01L21/76895H01L21/823487H01L29/7397H01L29/7813
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Quick Facts
Patent No.
US 9,929,181
App. No.
15/375,277
Granted
Mar 27, 2018
Kind
B2
Abstract

According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.

Claims (16)

1. A method for manufacturing an electronic device, the method comprising:

providing a carrier comprising at least a first region and a second region being laterally adjacent to each other;

forming an electrically insulating structure arranged in the first region of the carrier, wherein the electrically insulating structure comprises one or more hollow chambers and the second region of the carrier is free of the electrically insulating structure, and wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material;

forming a first electronic component in the first region of the carrier over the electrically insulating structure; and

forming a second electronic component in the second region of the carrier,

wherein the second electronic component comprises at least one second trench structure, and wherein the at least one second trench structure comprising at least one sidewall being covered with an electrically insulating material, and

wherein the at least one second trench structure is at least partially filled with an electrically conductive material.

2. The method of claim 1 ; further comprising

forming at least one first trench structure in the carrier extending from a surface of the carrier so that the at least one first trench structure electrically separates the first electronic component from the second electronic component, wherein the at least one first trench structure comprises at least one sidewall being covered with an electrically insulating material and is at least partially filled with an electrically conductive material.

3. The method of claim 1 ,

wherein the carrier comprises a first surface and a second surface opposite the first surface;

wherein the second electronic component is configured to provide a current flow between the first surface and the second surface.

4. The method of claim 3 ,

wherein the second electronic component comprises a vertical transistor configured to provide the current flow between the first surface and the second surface.

5. The method of claim 1 ,

wherein the first electronic component and the second electronic component are electrically coupled with each other via a metallization structure being disposed over the carrier.

Continuity (2)
Division 14098591 · Dec 6, 2013
Related Publication 20170092659A1 · Mar 30, 2017