IP Library › Granted Patent US 11,586,565
Granted Patent B2
US 11,586,565 · App. 15/384,164 · Granted Feb 21, 2023

Non-volatile storage system and data storage access protocol for non-volatile storage devices

Inventors: Chinnakrishnan Ballapuram (San Jose, CA); Wentao Wu (San Jose, CA)
Assignee: Samsung Electronics Co., Ltd.
G06F13/18G06F13/1668G06F13/4068G06F13/4282G06F2213/0026
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Quick Facts
Patent No.
US 11,586,565
App. No.
15/384,164
Granted
Feb 21, 2023
Kind
B2
Abstract

A non-volatile storage system includes: a host and a storage device. The host includes a submission queue memory, a completion queue memory, and a read/write data memory, and the storage device includes: a controller configured to concurrently communicate with the read/write data memory and with at least one of the submission queue memory and the completion queue memory; and a memory device configured to communicate with the controller.

Claims (26)

1. A non-volatile storage system comprising:

a host comprising a submission queue memory, a completion queue memory, and a read/write data memory; and

a storage device comprising:

a controller configured to concurrently communicate with the read/write data memory and with at least one of the submission queue memory and the completion queue memory; and

a memory device configured to communicate with the controller,

wherein the controller is configured to concurrently receive data from the read/write data memory and from the submission queue memory,

wherein a physical interface connecting the controller and the host to each other is configured for the host to concurrently send data from both the read/write data memory and the submission queue memory by utilizing either dedicated lanes or dynamically configurable lanes of the physical interface, and

wherein the physical interface operates according to a protocol, the protocol being configured to prioritize data from the submission queue memory over the data from the read/write data memory via the physical interface.

2. The non-volatile storage system of claim 1 , wherein the controller is configured to concurrently receive data from the read/write data memory and transmit data to the completion queue memory,

wherein the physical interface is configured for the host to concurrently send data from the read/write data memory and transmit data to the completion queue memory by utilizing either the dedicated lanes or the dynamically configurable lanes, and

wherein the protocol is configured to prioritize data to the completion queue memory over the data from the read/write data memory via the physical interface.

3. A non-volatile storage system comprising:

a host comprising a submission queue memory, a completion queue memory, and a read/write data memory; and

a storage device comprising:

a controller configured to concurrently communicate with the read/write data memory and with at least one of the submission queue memory and the completion queue memory; and

a memory device configured to communicate with the controller,

wherein the controller is configured to concurrently communicate with the read/write data memory via a data interface and with the at least one of the submission queue memory and the completion queue memory via a command interface, and

wherein the command interface is configured to selectively transmit data between the controller and the read/write data memory and between the controller and the at least one of the submission queue memory and the completion queue memory.

4. The non-volatile storage system of claim 3 , wherein the storage device is configured to communicate with the host via a peripheral component interconnect express (PCIe) bus having a plurality of lanes.

5. The non-volatile storage system of claim 4 , wherein the command interface comprises some of the lanes of the PCIe bus, and the data interface comprises the remaining lanes of the PCIe bus.

6. A method of data storage access between a host and a non-volatile storage device, the host comprising a submission queue memory, a completion queue memory, and a read/write data memory, the non-volatile storage device comprising: a controller configured to concurrently communicate with the read/write data memory and with at least one of the submission queue memory and the completion queue memory; and a memory device configured to communicate with the controller, the method comprising:

initiating a data communication between a host and controller of a storage device via a data interface via a physical interface; and

initiating a command communication between at least one of the submission queue memory and the completion queue memory of the host and the controller via a command interface such that the data and command communications temporally overlap by utilizing either dedicated lanes or dynamically configurable lanes of the physical interface,

wherein the data interface and the command interface communicate according to a same protocol over the physical interface, the protocol being configured to prioritize data from the submission queue memory over the data from the read/write data memory via the physical interface.

7. The method of claim 6 , wherein the data communication is a transmission of write data from the host to the controller or a transmission of read data from the controller to the host, and

wherein the command communication is a read command from the host to the controller or a write command from the host to the controller.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2016
From: BALLAPURAM, CHINNAKRISHNAN; WU, WENTAO
To: SAMSUNG ELECTRONICS CO., LTD
Reel/Frame 040759/0887 →
Continuity (2)
Provisional Application 62403626 · Oct 3, 2016
Related Publication 20180095911A1 · Apr 5, 2018