Three dimensional device integration method and integrated device
View Patent ↗A method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.
1. An integration method, comprising:
preparing a first element having a first layer of bondable material for direct bonding;
preparing a second element for direct bonding;
polishing the first layer of bondable material;
bringing into direct contact the first layer of bondable material with the second element after polishing the first layer of bondable material;
directly bonding the first layer of bondable material to the second element with a covalent bond at room temperature; and
after the bonding, removing a portion of the first element by one of polishing and grinding to leave a remaining portion of the first element.
2. The method of claim 1 , wherein preparing the first layer of bondable material comprises providing the first layer of bondable material with a surface roughness less than about 1 nm (rms) on the first element.
3. The method of claim 2 , wherein preparing the second element comprises providing a surface of the second element with a surface roughness less than about 1 nm (rms) on the second element).
4. An integration method, comprising:
preparing a first element having a first layer of bondable material for direct bonding;
providing a second layer of bondable material over the first layer of bondable material, the second layer of bondable material having a lower surface roughness than the first layer of bondable material;
preparing a second element for direct bonding;
bringing into direct contact the first layer of bondable material with the second element;
directly bonding the first layer of bondable material to the second element with a covalent bond at room temperature; and
after the bonding, removing a portion of the first element by one of polishing and grinding to leave a remaining portion of the first element.
5. The method of claim 4 , wherein providing the first layer of bondable material comprises providing a first oxide layer and wherein providing the second layer of bondable material comprises providing a second oxide layer.
6. The method of claim 4 , wherein providing the second layer of bondable material comprises providing the second layer of bondable material with a surface roughness less than about 1 nm (rms) on the first layer of bondable material.
7. An integration method, comprising:
preparing a first element having a first layer of bondable material for direct bonding;
preparing a second element for direct bonding;
bringing into direct contact the first layer of bondable material with the second element;
directly bonding the first layer of bondable material to the second element with a covalent bond at room temperature; and
after the bonding, removing a portion of the first element by one of polishing and grinding to leave a remaining portion of the first element,
wherein preparing the first element comprises preparing a first semiconductor element.
8. The method of claim 1 , wherein preparing the first element comprises forming an optical device in the first element.
9. The method of claim 1 , wherein preparing the first element comprises forming a first microelectromechanical systems (MEMS) element in the first element.
10. The method of claim 1 , wherein directly bonding comprises directly bonding a first front surface of the first element with a second front surface of the second element, wherein one or more integrated devices are formed at or near the first and second front surfaces.
11. The method of claim 1 , further comprising annealing the first and second elements after the directly bonding.
12. The method of claim 7 , further comprising polishing the first layer of bondable material prior to bringing into direct contact.
13. The method of claim 7 , wherein preparing the first layer of bondable material comprises providing the first layer of bondable material with a surface roughness less than about 1 nm (rms) on the first semiconductor element.
14. The method of claim 13 , wherein preparing the second element comprises providing a surface of the second element with a surface roughness less than about 1 nm (rms) on the second element).
15. The method of claim 7 , wherein preparing the second semiconductor element comprises preparing a second semiconductor element.
16. The method of claim 7 , wherein preparing the first semiconductor element comprises forming an optical device in the first semiconductor element.
17. The method of claim 7 , wherein preparing the first semiconductor element comprises forming a first microelectromechanical systems (MEMS) element in the first semiconductor element.
18. The method of claim 7 , wherein directly bonding comprises directly bonding a first front surface of the first semiconductor element with a second front surface of the second element, wherein one or more integrated devices are formed at or near the first and second front surfaces.
19. The method of claim 7 , further comprising annealing the first and second elements after the directly bonding.
20. The method of claim 1 , wherein preparing the first element comprises preparing a first semiconductor element.