Packaging system with cleaning channel and method of making the same
View Patent ↗A packaging structure and method for surface mount integrated circuits reduces electrochemical migration (ECM) problems by including one or more cleaning channels to effectively and efficiently remove flux residue that may otherwise remain lodged in gaps between the surface mount package and the printed circuit board. A cleaning channel may be formed along a bottom surface of the surface mount package (i.e., the surface facing the printed circuit board), or along a portion of a top surface of the printed circuit board. In either case, the inclusion of a cleaning channel enlarges the gap between the bottom surface of the surface mount package and the printed circuit board and creates a path for contaminants to be flushed out during a cleaning process.
1. A packaging system including
a surface mounted integrated circuit package;
a printed circuit board for supporting physical attachment and electrical connections to the surface mounted integrated circuit package; and
at least one cleaning channel formed between opposing surfaces of the printed circuit board and the surface mounted integrated circuit package, the at least one cleaning channel providing an enlarged gap therebetween to enhance removal of solder flux residue and minimize electrochemical migration based packaging system failure;
wherein at least a portion of the at least one cleaning channel is formed within a bottom surface of the surface mounted integrated circuit package.
2. The packaging system as defined in claim 1 wherein the at least one cleaning channel comprises a single cleaning channel.
3. The packaging system as defined in claim 1 wherein the at least one cleaning channel comprises a plurality of cleaning channels.
4. The packaging system as defined in claim 3 wherein the plurality of cleaning channels comprises a pair of cleaning channels disposed in a perpendicular configuration.
5. The packaging system as defined in claim 1 wherein the at least one cleaning channel is formed to exhibit a depth in the range of 0.2 mm to 1.0 mm.
6. The packaging system as defined in claim 1 wherein the at least one cleaning channel comprises an upper cleaning channel portion formed within a bottom surface of the surface mounted integrated circuit package and a lower cleaning channel portion formed within a top surface of the printed circuit board, the first and second cleaning channels exhibiting overlap when the surface mounted integrated circuit package is attached to the printed circuit board.
7. The packaging system as defined in claim 1 wherein the packaging system further comprises
a high dielectric constant material disposed to fill the at least one cleaning channel subsequent to a printed circuit board cleaning process.