Semiconductor device and portable apparatus using the same

Inventors: Masamichi Yanagida (Gunma-ken, JP); Masashi Koyano (Gunma-ken, JP); Nobuyoshi Matsuura (Gunma-ken, JP); Hiroki Arai (Gunma-ken, JP)

Assignee: UPI SEMICONDUCTOR CORP.

H01L29/7827 H01L23/49541 H01L23/49575 H01L27/0207 H01L27/088 H01L23/3121 H01L23/49503 H01L24/06 H01L24/16 H01L24/29 H01L24/32 H01L24/48 H01L24/73 H01L2224/0401 H01L2224/04042 H01L2224/05553 H01L2224/05554 H01L2224/0603 H01L2224/06051 H01L2224/06181 H01L2224/16245 H01L2224/2919 H01L2224/32145 H01L2224/48091 H01L2224/48147 H01L2224/48247 H01L2224/48465 H01L2224/73253 H01L2224/73265 H01L2224/85439 H01L2924/00014 H01L2924/13091 H01L2924/14 H01L2924/181 H01L2924/3512 H02J7/0029

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Quick Facts

Patent No.: US 10,490,659
App. No.: 15/391,136
Granted: Nov 26, 2019
Kind: B2

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Abstract

The present invention provides a semiconductor device that can achieve miniaturization or thinning of the size of the package while maintaining the characteristic of the MOSFET and reducing the on-resistance value, and a portable apparatus using the same. The gate electrodes 26 and 28 of the semiconductor chip 10 are disposed in the vicinity of the two side surfaces of the longitudinal direction (the x axis direction on the page) of the package 2 , and the gate terminal 13 and 14 that is mounted with the gate electrodes 26 and 28 in a flip-chip manner are extended in the longitudinal direction of the package 2 and are derived to the outside from the two side surfaces 2 A and 2 B. Based on the configuration, it is capable of maximizing the size of the semiconductor chip with respect to the size of the package, and it is able to realize the high performance of the element characteristic for the module.

Claims (53)

1. A semiconductor device, comprising:

a frame;

a semiconductor chip having a main surface mounted on the frame in a flip-chip manner;

an integrated circuit (IC) chip stacked and fixed on a surface of the semiconductor chip opposite to the main surface;

metal wires electrically connected to the semiconductor chip and the IC chip; and

a package encapsulating the frame, the semiconductor chip, the IC chip, and the metal wires,

wherein the package has two side surfaces opposite to each other in the longitudinal direction of the package,

wherein the semiconductor chip is formed with a first transistor and a second transistor, a gate electrode and a source electrode of the first transistor formed on the main surface is arranged beside one of the side surfaces of the package, and a gate electrode and a source electrode of the second transistor formed on the main surface is arranged beside the other one of the side surfaces of the package, and

wherein gate terminals of the frame mounted with the gate electrodes are respectively extended to the two side surfaces of the package, and at least one of the source electrodes on the main surface is electrically connected to the IC chip on the semiconductor chip through at least one of the metal wires.

2. The semiconductor device according to claim 1 , wherein one of the gate terminals of the frame where the gate electrode of the first transistor is mounted extends along the longitudinal direction and is exposed from the one of the side surfaces of the package, and the other one of the gate terminals of the frame where the gate electrode of the second transistor is mounted extends along the longitudinal direction and is exposed from the other one of the side surfaces of the package.

3. The semiconductor device according to claim 2 , wherein the metal wire electrically connected to the gate electrode of the first transistor is connected to the gate terminal of the frame between the gate electrode of the first transistor and the one of the side surfaces of the package, and the metal wire electrically connected with the gate electrode of the second transistor is connected to the gate terminal of the frame between the gate electrode of the second transistor and the other one of the side surfaces of the package.

4. The semiconductor device according to claim 3 , wherein the semiconductor chip has a common drain electrode of the first transistor and the second transistor formed on the surface opposite to the main surface, wherein a source terminal of the frame where the source electrode of the first transistor is mounted is exposed from the one of the side surfaces of the package, and wherein a source terminal of the frame where the source electrode of the second transistor is mounted is exposed from the other one of the side surfaces of the package.

5. The semiconductor device according to claim 2 , wherein the semiconductor chip has a common drain electrode of the first transistor and the second transistor formed on the surface opposite to the main surface, wherein a source terminal of the frame where the source electrode of the first transistor is mounted is exposed from the one of the side surfaces of the package, and wherein a source terminal of the frame where the source electrode of the second transistor is mounted is exposed from the other one of the side surfaces of the package.

6. The semiconductor device according to claim 1 , wherein the metal wire electrically connected to the gate electrode of the first transistor is connected to one of the gate terminals of the frame between the gate electrode of the first transistor and the one of the side surfaces of the package, and the metal wire electrically connected with the gate electrode of the second transistor is connected to the other one of the gate terminals of the frame between the gate electrode of the second transistor and the other one of the side surfaces of the package.

7. The semiconductor device according to claim 6 , wherein the semiconductor chip has a common drain electrode of the first transistor and the second transistor formed on the surface opposite to the main surface, wherein a source terminal of the frame where the source electrode of the first transistor is mounted is exposed from the one of the side surfaces of the package, and wherein a source terminal of the frame where the source electrode of the second transistor is mounted is exposed from the other one of the side surfaces of the package.

8. The semiconductor device according to claim 1 , wherein the semiconductor chip has a common drain electrode of the first transistor and the second transistor formed on the surface opposite to the main surface, wherein a source terminal of the frame where the source electrode of the first transistor is mounted is exposed from the one of the side surfaces of the package, and wherein a source terminal of the frame where the source electrode of the second transistor is mounted is exposed from the other one of the side surfaces of the package.

9. The semiconductor device according to claim 1 , wherein a source electrode of the first transistor is arranged side by side with the gate electrode of the first transistor in the longitudinal direction of the semiconductor chip; a source electrode of the second transistor is arranged side by side with the gate electrode of the second transistor in the longitudinal direction of the semiconductor chip, wherein the gate electrode and the source electrode of the first transistor and the gate electrode and the source electrode of the second transistor are disposed rotationally symmetric with respect to a central point of the semiconductor chip.

10. A portable apparatus, comprising: