IP Library › Granted Patent US 10,354,039
Granted Patent B1
US 10,354,039 · App. 15/396,205 · Granted Jul 16, 2019

Method, system, and computer program product for implementing legal placement with contextual awareness for an electronic design

Inventors: Henry Yu (Palo Alto, CA); Vinny George Korah (Tempe, AZ)
Assignee: Cadence Design Systems, Inc.
G06F17/5072G06F17/5081G06F2217/06
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Quick Facts
Patent No.
US 10,354,039
App. No.
15/396,205
Granted
Jul 16, 2019
Kind
B1
Abstract

Disclosed are techniques for implementing legal placement with contextual awareness for an electronic design. These techniques identify one or more hierarchies from one or more groups or one or more instances located at these one or more hierarchies in a layout or floorplan. A plurality of instances including the one or more identified instances may be promoted to an honorary top hierarchy. A layout operation may then be performed on the one or more identified instances based in part or in whole upon a boundary requirement and context information.

Claims (86)

1. A computer implemented method for implementing legal placement with contextual awareness for an electronic design, comprising:

identifying one or more hierarchies from one or more groups or one or more instances located at the one or more hierarchies in a layout or floorplan in a user interface;

flattening, at one or more context aware modules stored at least partially in memory and functioning in tandem with one or more microprocessors of at least one computing system, a portion of the layout or floorplan at least by promoting at least the one or more instances to an honorary top hierarchy;

generating a first reduced layout or floorplan at least by suppressing a plurality of circuit component designs at one or more first hierarchies that are located below the one or more hierarchies and at least by representing the plurality of circuit component designs as corresponding lightweight representations having reduced design information in a user interface;

generating a second reduced layout or floorplan at least by performing a layout operation on the corresponding lightweight representations in the first reduced layout or floorplan in the user interface based in part or in whole upon a boundary requirement of a photolithographic manufacturing process and context information generated by promoting the one or more instances to the honorary top hierarchy; and

causing manufacturing of a version of the second reduced layout or floorplan with at least the photolithographic manufacturing process using one or more photomasks on lithography equipment.

2. The computer implemented method of claim 1 , further comprising:

updating one or more affected groups, a hierarchical structure of the layout or floorplan.

3. The computer implemented method of claim 1 , identifying the one or more hierarchies or the one or more instances comprising:

configuring an environment that provides full or lightweight access to individual circuit component designs in the layout for the one or more context aware modules;

identifying a selection mode that includes a hierarchy selection mode or an instance selection mode; and

identifying the one or more hierarchies or the one or more instances based in part or in whole upon the selection mode.

4. The computer implemented method of claim 3 , identifying the one or more hierarchies or the one or more instances comprising:

identifying the one or more instances into a plurality of honorary top hierarchy instances; and

identifying one or more additional instances located at one or more intervening hierarchies between the honorary top hierarchy and the one or more hierarchies into the plurality of honorary top hierarchy instances.

5. The computer implemented method of claim 4 , identifying the one or more hierarchies or the one or more instances comprising:

modifying the one or more instances based in part or in whole upon a user input.

6. The computer implemented method of claim 1 , promoting at least the one or more instances comprising:

configuring a block of the memory based in part or in whole upon a plurality of physical characteristics of the layout or the floorplan for storing hierarchical design information of the layout or the floorplan;

identifying a plurality of honorary top hierarchy instances; and

identifying circuit component designs originally located at the honorary top hierarchy into the plurality of honorary top hierarchy instances.

7. The computer implemented method of claim 6 , promoting at least the one or more instances comprising:

generating a model at least by inserting and arranging the plurality of honorary top hierarchy instances;

maintaining the layout or the floorplan without modifications; and

providing the model to the one or more context aware modules for performance of the layout operation.

8. The computer implemented method of claim 1 , promoting at least the one or more instances comprising:

identifying a plurality of honorary top hierarchy instances;

identifying a first hierarchy at which the plurality of honorary top hierarchy instances are located;

identifying one or more higher hierarchies at or above the first hierarchy; and

modifying a hierarchical structure of the layout or the floorplan at least by flattening a first portion of the layout or the floorplan according to the first hierarchy.

9. The computer implemented method of claim 1 , promoting at least the one or more instances comprising:

modifying the hierarchical structure of the layout or the floorplan at least by flattening a second portion of the layout or the floorplan according to the one or more higher hierarchies; and

updating information of the hierarchical structure based in part or in whole upon results of flattening the first portion or results of flattening the second portion.

10. The computer implemented method of claim 1 , performing the layout operation comprising:

identifying or determining the boundary requirement, wherein the boundary requirement comprises a maximal flexibility boundary requirement, a fixed boundary requirement, or a derived boundary requirement; and

identifying a modified layout created by modifying a hierarchical structure of the layout or floorplan or a model created from the layout or the floorplan and stored in a block in the memory.

11. The computer implemented method of claim 10 , performing the layout operation comprising:

identifying the context information pertaining to the one or more instances; and

modifying the layout or the floorplan at least by performing the layout operation on the one or more instances based in part or in whole upon the boundary requirement and the context information.

12. The computer implemented method of claim 11 , performing the layout operation comprising:

propagating modifications made to the model by the layout operation to the layout or floorplan when the model is identified for the layout operation; and

undo results of promoting at least the one or more instances to the honorary top hierarchy.

13. A system for implementing legal placement with contextual awareness for an electronic design, comprising:

a plurality of context aware modules, at least one of which comprises at least one microprocessor including one or more processor cores executing one or more threads in a computing system;

a non-transitory computer accessible storage medium storing thereupon program code that includes a sequence of instructions that, when executed by the at least one microprocessor or processor core of at least one computing system, causes the at least one micro-processor or processor core at least to:

identify one or more hierarchies from one or more groups or one or more instances located at the one or more hierarchies in a layout or floorplan in a user interface;

flatten, at one or more context aware modules of the plurality of context aware modules, a portion of the layout or floorplan at least by promoting at least the one or more instances to an honorary top hierarchy;

generating a first reduced layout or floorplan at least by suppressing a plurality of circuit component designs at one or more first hierarchies that are located below the one or more hierarchies at least by representing the plurality of circuit component designs as corresponding lightweight representations having reduced design information in a user interface;

generating a second reduced layout or floorplan at least by perform a layout operation on the corresponding lightweight representations in the first reduced layout or floorplan in the user interface based in part or in whole upon a boundary requirement of a photolithographic manufacturing process and context information generated by promoting the one or more instances to the honorary top hierarchy; and

causing manufacturing of a version of the second reduced layout or floorplan with at least the photolithographic manufacturing process using one or more photomasks on lithography equipment.

14. The system of claim 13 , wherein the program code includes further instructions that, when executed by the at least one micro-processor or processor core, cause the at least one processor or processor core to:

configure an environment that provides full or lightweight access to individual circuit component designs in the layout for the one or more context aware modules;

identify a selection mode that includes a hierarchy selection mode or an instance selection mode; and

identify the one or more hierarchies or the one or more instances or the one based in part or in whole upon the selection mode.

15. The system of claim 14 , wherein the program code includes further instructions that, when executed by the at least one micro-processor or processor core, cause the at least one processor or processor core to:

identify the one or more instances into a plurality of honorary top hierarchy instances;

identify one or more additional instances located at one or more intervening hierarchies between the honorary top hierarchy and the one or more hierarchies into the plurality of honorary top hierarchy instances; and

modify the one or more instances based in part or in whole upon a user input.

16. The system of claim 13 , wherein the program code includes further instructions that, when executed by the at least one micro-processor or processor core, cause the at least one processor or processor core to:

configure a block of the memory based in part or in whole upon a plurality of physical characteristics of the layout or the floorplan for storing hierarchical design information of the layout or the floorplan;

identify a plurality of honorary top hierarchy instances;

identify circuit component designs originally located at the honorary top hierarchy into the plurality of honorary top hierarchy instances;

generate a model at least by inserting and arranging the plurality of honorary top hierarchy instances;

maintain the layout or the floorplan without modifications; and

provide the model to the one or more context aware modules for performance of the layout operation.

17. An article of manufacture comprising a non-transitory computer accessible storage medium having stored thereupon a sequence of instructions which, when executed by at least one processor or at least one processor core executing one or more threads, causes the at least one processor or the at least one processor core to perform a set of acts for implementing legal placement with contextual awareness for an electronic design, the set of acts comprising:

identifying one or more hierarchies from one or more groups or one or more instances located at the one or more hierarchies in a layout or floorplan;

flattening, at one or more context aware modules stored at least partially in memory and functioning in tandem with one or more microprocessors of at least one computing system, a portion of the layout or floorplan at least by promoting at least the one or more instances to an honorary top hierarchy;

generating a first reduced layout or floorplan at least by suppressing a plurality of circuit component designs at one or more first hierarchies that are located below the one or more hierarchies at least by representing the plurality of circuit component designs as corresponding lightweight representations having reduced design information in a user interface;

generating a second reduced layout or floorplan at least by performing a layout operation on the corresponding lightweight representations in the first reduced layout or floorplan in the user interface based in part or in whole upon a boundary requirement of a photolithographic manufacturing process and context information generated by promoting the one or more instances to the honorary top hierarchy; and

causing manufacturing of a version of the second reduced layout or floorplan with at least the photolithographic manufacturing process using one or more photomasks on lithography equipment.

18. The article of manufacture of claim 17 , the set of acts further comprising:

identifying a plurality of honorary top hierarchy instances;

identifying a first hierarchy at which the plurality of honorary top hierarchy instances are located;

identifying one or more higher hierarchies at or above the first hierarchy; and

modifying a hierarchical structure of the layout or the floorplan at least by flattening a first portion of the layout or the floorplan according to the first hierarchy.

19. The article of manufacture of claim 17 , the set of acts further comprising:

modifying the hierarchical structure of the layout or the floorplan at least by flattening a second portion of the layout or the floorplan according to the one or more higher hierarchies; and

updating information of the hierarchical structure based in part or in whole upon results of flattening the first portion or results of flattening the second portion.

20. The article of manufacture of claim 17 , the set of acts further comprising:

identifying or determining the boundary requirement, wherein the boundary requirement comprises a maximal flexibility boundary requirement, a fixed boundary requirement, or a derived boundary requirement;

identifying a modified layout created by modifying a hierarchical structure of the layout or floorplan or a model created from the layout or the floorplan and stored in a block in the memory;

identifying the context information pertaining to the one or more instances;

modifying the layout or the floorplan at least by performing the layout operation on the one or more instances based in part or in whole upon the boundary requirement and the context information;

propagating modifications made to the model by the layout operation to the layout or floorplan when the model is identified for the layout operation; and

undo results of promoting at least the one or more instances to the honorary top hierarchy.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2016
From: YU, HENRY; KORAH, VINNY GEORGE
To: CADENCE DESIGN SYSTEMS, INC.
Reel/Frame 040812/0399 →
Cited By (1)
US 12,694,192