IP Library Granted Patent US 10,379,769
Granted Patent B2
US 10,379,769 · App. 15/396,294 · Granted Aug 13, 2019

Continuous adaptive calibration for flash memory devices

Inventors: Dillip K. Dash (San Diego, CA); Aniryudh Reddy Durgam (San Diego, CA); Haritha Uppalapati (San Diego, CA)
Assignee: Western Digital Technologies, Inc.
G06F3/0634G06F3/0611G06F3/0679G06F3/0653
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Quick Facts
Patent No.
US 10,379,769
App. No.
15/396,294
Granted
Aug 13, 2019
Kind
B2
Abstract

A method for managing a flash storage system includes measuring an operation time to complete a data operation on a flash memory block of a flash memory device of the flash storage system. The method includes updating, based on the measured operation time, a running average time for the flash memory device to complete the data operation. The method includes comparing the updated running average time to a threshold time. The method includes adjusting an operating parameter for the flash memory device to perform the data operation based on the comparison.

Claims (59)

1. A method for managing a flash storage system, comprising:

in response to a start of a data operation on a flash memory block of a flash memory device among a plurality of flash memory devices of the flash storage system, periodically sending a beacon at a regular interval to the flash memory device at a beacon frequency;

determining whether the data operation is completed; and

in response to determining that the data operation is completed:

determining, based on the beacon frequency and a number of beacons sent, an operation time for the data operation to complete on the flash memory block of the flash memory device among the plurality of flash memory devices of the flash storage system;

updating, based on the operation time, a running average time for the flash memory device to complete the data operation;

comparing the updated running average time to a threshold time; and

adjusting a plurality of operating parameters for the flash memory device based on the comparison.

2. The method of claim 1 , wherein determining whether the data operation is completed further comprises:

receiving, from the flash memory device, in response to the beacon, an indication that the data operation is completed.

3. The method of claim 1 , wherein comparing the updated running average time to the threshold time further comprises:

determining a difference between the updated running average time and the threshold time.

4. The method of claim 3 , wherein adjusting the plurality of operating parameters further comprises:

determining whether the difference satisfies an error threshold; and

when the difference does not satisfy the error threshold, adjusting the plurality of operating parameters for the flash memory device.

5. The method of claim 1 , wherein the running average time corresponds to a plurality of flash memory blocks of the flash memory device.

6. The method of claim 5 , wherein adjusting the plurality of operating parameters further comprises adjusting an operating parameter for a subset of the plurality of flash memory blocks to perform the data operation.

7. The method of claim 1 , wherein the running average time is based on a predetermined number of cycles.

8. The method of claim 1 , wherein the data operation is a program operation.

9. The method of claim 1 , wherein the data operation is an erase operation.

10. A flash storage system, comprising:

means for in response to a start of a data operation on a flash memory block of a flash memory device of the flash storage system, periodically sending a beacon at a regular interval to the flash memory device at a beacon frequency;

means for determining whether the data operation is completed; and

in response to determining that the data operation is completed:

means for determining an operation time for the data operation to complete on the flash memory block of the flash memory device of the flash storage system;

means for updating, based on the operation time, a running average time for the flash memory device to complete the data operation;

means for comparing the updated running average time to a threshold time; and

means for adjusting a plurality of operating parameters for the flash memory device based on the comparison.

11. The flash storage system of claim 10 , wherein the means for determining whether the data operation is completed further comprises:

means for receiving, from the flash memory device, in response to the beacon, an indication that the data operation is completed.

12. The flash storage system of claim 10 , wherein the means for comparing the updated running average time to the threshold time further comprises:

means for determining a difference between the updated running average time and the threshold time.

13. The flash storage system of claim 12 , wherein the means for adjusting the plurality of operating parameters further comprises:

means for determining whether the difference satisfies an error threshold; and

means for adjusting, when the difference does not satisfy the error threshold, the plurality of operating parameters for the flash memory device.

14. The flash storage system of claim 10 , wherein the running average time corresponds to a plurality of flash memory blocks of the flash memory device.

15. The flash storage system of claim 14 , wherein the means for adjusting the plurality of operating parameters further comprises means for adjusting an operating parameter for a subset of the plurality of flash memory blocks to perform the data operation.

16. The flash storage system of claim 10 , wherein the running average time is based on a predetermined number of cycles.

17. A flash storage system, comprising:

a plurality flash memory devices; and

a controller configured to:

in response to a start of a data operation on a flash memory block of a flash memory device among a plurality of flash memory devices of the flash storage system, periodically send a beacon at a regular interval to the flash memory device at a beacon frequency;

determine whether the data operation is completed; and

when the data operation is completed,

determine, based on the beacon frequency and a number of beacons sent, an operation time for the data operation to complete on the flash memory block of the flash memory device among the plurality of flash memory devices of the flash storage system;

update, based on the operation time, a running average time for the flash memory device to complete the data operation;

compare the updated running average time to a threshold time; and

adjust a plurality of operating parameters for the flash memory device based on the comparison.

18. The flash storage system of claim 17 , wherein the controller is configured to:

receive, from the flash memory device, in response to the beacon, an indication that the data operation is completed.

19. The flash storage system of claim 17 , wherein the controller is configured to:

determine a difference between the updated running average time and the threshold time.

20. The flash storage system of claim 19 , wherein the controller is configured to:

determine whether the difference satisfies an error threshold; and

when the difference does not satisfy the error threshold, adjust the plurality of operating parameters for the flash memory device.

21. The flash storage system of claim 17 , wherein the running average time corresponds to a plurality of flash memory blocks of the flash memory device.

22. The flash storage system of claim 21 , wherein the controller is configured to:

adjust an operating parameter of the plurality of operating parameters for a subset of the plurality of flash memory blocks to perform the data operation.

23. The flash storage system of claim 17 , wherein the running average time is based on a predetermined number of cycles.

Assignments (3)
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2017
From: DASH, DILLIP K.; UPPALAPATI, HARITHA; DURGAM, ANIRYUDH REDDY
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040863/0952 →
Continuity (1)
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