IP Library › Granted Patent US 10,085,358
Granted Patent B2
US 10,085,358 · App. 15/396,646 · Granted Sep 25, 2018

Technologies for sled architecture

Inventors: Matthew J. Adiletta (Bolton, MA); Aaron Gorius (Upton, MA); Myles Wilde (Charlestown, MA); Michael T. Crocker (Portland, OR)
Assignee: Intel Corporation
H05K7/1489G06F1/183H05K1/181H05K7/1492H05K7/2039H05K7/20709H05K2201/10121H05K2201/10159H05K2201/10189
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Quick Facts
Patent No.
US 10,085,358
App. No.
15/396,646
Filed
Dec 31, 2016
Granted
Sep 25, 2018
Kind
B2
Art Unit
2835
USPC
361/679.32
Abstract

A sled for operation in a corresponding rack of a data center includes a chassis-less circuit board substrate having one or more physical resources coupled to a top side of the chassis-less circuit board and one or more memory devices coupled to a bottom side of the chassis-less circuit board. The sled does not include a housing or chassis and is opened to the local environment. In the illustrative embodiments, the sled may be embodied as a compute sled, an accelerator sled, or a storage sled.

Claims (31)

1. A sled for operation in a rack of a data center, the sled comprising:

a chassis-less circuit board substrate having a top side and a bottom side opposite the top side; and

a plurality of electrical components coupled to the chassis-less circuit board substrate, wherein no two electrical components of the plurality of electrical components that produce non-nominal heat during operation shadow each other along a direction that extends from a front edge of the chassis-less circuit board substrate to a back edge of the chassis-less circuit board substrate,

wherein the plurality of electrical components includes (i) one or more physical resources coupled to the top side of the chassis-less circuit board substrate and (ii) one or more memory devices coupled to the bottom side of the chassis-less circuit board substrate, wherein each of the one or more memory devices is electrically coupled to at least one of the one or more physical resources.

2. The sled of claim 1 , wherein the chassis-less circuit board substrate is exposed to the local environment.

3. The sled of claim 1 , further comprising a plurality of electrical components, including the one or more physical resources and the one or more memory devices, coupled to the chassis-less circuit board substrate, wherein no electrical component of the sled is cooled by an active cooling system of the sled during operation of the sled.

4. The sled of claim 3 , further comprising a power connector to mate with a corresponding power connector of the rack to provide power to the electrical components of the sled.

5. The sled of claim 1 , further comprising a plurality of electrical components, including the one or more physical resources and the one or more memory devices, coupled to the chassis-less circuit board substrate, wherein no electrical component of the sled receives power from a power supply of the sled during operation of the sled.

6. The sled of claim 1 , wherein the chassis-less circuit board substrate has a rectangular shape having a width and a depth, and the width of the chassis-less circuit board substrate is greater than the depth of the chassis-less circuit board.

7. The sled of claim 6 , wherein the width is about twenty-one inches and the depth is about nine inches.

8. The sled of claim 1 , further comprising a network interface controller coupled to the top side of the chassis-less circuit board substrate.

9. The sled of claim 8 , further comprising an optical data connector secured to the top side of the chassis-less circuit board substrate, wherein the optical data connector is to mate with a corresponding optical data connector of the rack and is electrically coupled to the network interface controller.

10. The sled of claim 1 , further comprising (i) a first expansion connector secured to the top side of the chassis-less circuit board substrate and (ii) an expansion chassis-less circuit board substrate having a second expansion connector mated with the first expansion connector, wherein the expansion chassis-less circuit board substrate includes one or more physical resources usable by the sled controllers of the chassis-less circuit board substrate.

11. The sled of claim 1 , wherein chassis-less circuit board substrate further comprises one or more mounting features to mate with a mounting arm of a robot to allow the robotic mounting of the sled into the rack.

12. The sled of claim 1 , wherein the one or more memory devices comprises a dual in-line memory module that has a longitudinal axis that is parallel to a side edge of the chassis-less circuit board substrate.

13. The sled of claim 1 , further comprising a controller-to-controller interconnect, wherein each physical resource is communicatively coupled to the controller-to-controller interconnect to communicate with each other physical resource.

14. A compute sled for operation in a rack of a data center, the compute sled comprising:

a chassis-less circuit board substrate having a top side and a bottom side opposite the top side; and

a plurality of electrical components coupled to the chassis-less circuit board substrate, wherein no two electrical components of the plurality of electrical components that produce non-nominal heat during operation shadow each other along a direction that extends from a front edge of the chassis-less circuit board substrate to a back edge of the chassis-less circuit board substrate,

wherein the plurality of electrical components includes (i) a plurality of processors coupled to the top side of the chassis-less circuit board substrate and (ii) a plurality of memory devices coupled to the bottom side of the chassis-less circuit board substrate, wherein each of the plurality of memory devices is electrically coupled to at least one of the plurality of processors.

15. The compute sled of claim 14 , further comprising a heatsink coupled to each processor, wherein each heatsink has a width and the sum of the widths of the heatsinks is greater than one-half of a width of the chassis-less circuit board substrate.

16. The compute sled of claim 14 , wherein further comprising a fan-less heatsink coupled to each processor.

17. The compute sled of claim 14 , wherein the plurality of memory devices includes a dual in-line memory module that has a longitudinal axis that is parallel to a side edge of the chassis-less circuit board substrate.

18. The compute sled of claim 14 , wherein each of the plurality of processors operate at a power rating of at least 250 watts.

19. An accelerator sled for operation in a rack of a data center, the accelerator sled comprising

a chassis-less circuit board substrate having a top side and a bottom side opposite the top side; and

a plurality of electrical components coupled to the chassis-less circuit board substrate, wherein no two electrical components of the plurality of electrical components that produce non-nominal heat during operation shadow each other along a direction that extends from a front edge of the chassis-less circuit board substrate to a back edge of the chassis-less circuit board substrate,

wherein the plurality of electrical components includes (i) a plurality of accelerator circuits coupled to the top side of the chassis-less circuit board substrate and (ii) a plurality of memory devices coupled to the bottom side of the chassis-less circuit board substrate, wherein each of the plurality of memory devices is electrically coupled to at least one of the plurality of accelerator circuits.

20. The accelerator sled of claim 19 , wherein further comprising a fan-less heatsink coupled to each accelerator circuit.

21. The accelerator sled of claim 19 , wherein each accelerator circuit comprises one of a field programmable gate array, an application-specific integrated circuit, a security co-processor, a graphics processing unit, a machine learning circuit, or a specialized processor.

22. The accelerator sled of claim 19 , wherein the plurality of accelerator circuits comprises four or more accelerator circuits.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2017
From: ADILETTA, MATTHEW; GORIUS, AARON; WILDE, MYLES; CROCKER, MICHAEL
To: INTEL CORPORATION
Reel/Frame 041130/0842 →
Continuity (4)
Provisional Application 62365969 · Jul 22, 2016
Provisional Application 62376859 · Aug 18, 2016
Provisional Application 62427268 · Nov 29, 2016
Related Publication 20180027687A1 · Jan 25, 2018
Cited By (6)
US 12,260,257 US 12,261,940 US 12,288,101 US 12,506,817 US 12,619,465 US 12,635,110