Semiconductor device with discrete blocks
A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.
1. A semiconductor device comprising:
a top package; and
a bottom package operably coupled to the top package, the bottom package comprising a die and a connection block separated from the die by a molding compound, wherein the connection block comprises a plurality of through vias and an integrated passive device, the integrated passive device comprising a surface planar with the die, the connection block, and the molding compound.
2. The semiconductor device of claim 1 , wherein the connection block comprises silicon.
3. The semiconductor device of claim 1 , wherein the connection block comprises silicon dioxide.
4. The semiconductor device of claim 1 , wherein the plurality of through vias has a pitch of about 60 μm.
5. The semiconductor device of claim 1 , wherein the integrated passive device is a trench capacitor.
6. The semiconductor device of claim 1 , further comprising a redistribution layer in an electrical connection with both the die and the connection block.
7. The semiconductor device of claim 1 , wherein the bottom package further comprises a second connection block separated from the die and the connection block by the molding compound.
8. A semiconductor device comprising:
an integrated passive device with a planar surface, the integrated passive device being located within a first material;
a through via extending from a first side of the first material to a second side of the first material;
a die separated from the first material by a first space;
an encapsulant filling the first space, wherein the encapsulant, the die, and the integrated passive device are planar with each other at the planar surface;
a redistribution layer extending over the first material, the encapsulant, and the die; and
a memory chip electrically connected to the redistribution layer.
9. The semiconductor device of claim 8 , wherein the integrated passive device is a capacitor.
10. The semiconductor device of claim 9 , wherein the capacitor is a trench capacitor.
11. The semiconductor device of claim 8 , wherein the first material is silicon dioxide.
12. The semiconductor device of claim 8 , wherein the first material is silicon.
13. The semiconductor device of claim 8 , further comprising a second through via extending from the first side of the first material to the second side of the first material, wherein a pitch between the through via and the second through via is about 60 μm.
14. The semiconductor device of claim 8 , further comprising an external connection in contact with the redistribution layer.
15. A semiconductor device comprising:
a stack of memory devices electrically connected to each other; and
a package electrically connected to the stack of memory devices, the package comprising:
a semiconductor die;
an molding compound laterally encapsulating the semiconductor die;
a connection block extending through the molding compound, wherein the molding compound is located between the semiconductor die and the connection block;
an integrated passive device located within the connection block, wherein the integrated passive device, the molding compound, and the semiconductor die are planar with each other at respective first sides; and
through vias extending from the first side of the connection block to a second side of the connection block.
16. The semiconductor device of claim 15 , wherein the connection block comprises silicon.
17. The semiconductor device of claim 15 , wherein the connection block comprises silicon dioxide.
18. The semiconductor device of claim 15 , wherein a pitch of the through vias is about 60 μm.
19. The semiconductor device of claim 15 , wherein the integrated passive device is a trench capacitor.
20. The semiconductor device of claim 15 , further comprising a redistribution layer overlying the molding compound, the semiconductor die, the connection block, and a second connection block.