P-FET with strained silicon-germanium channel
A method of forming a semiconductor structure includes forming a dummy gate above a semiconductor substrate. The dummy gate defines a source-drain region adjacent to the dummy gate and a channel region below the dummy gate. A silicon-germanium layer is epitaxially grown above the source-drain region with a target concentration of germanium atoms. The semiconductor structure is annealed to diffuse the germanium atoms from the silicon-germanium layer into the channel region to form a silicon-germanium channel region.
1. A method of forming a semiconductor structure, comprising:
epitaxially growing a silicon-germanium layer above a source-drain region, the silicon-germanium layer having a target concentration of germanium atoms;
annealing the semiconductor structure to diffuse germanium atoms from the silicon-germanium layer into a silicon channel region to form a silicon-germanium channel region;
removing the silicon-germanium layer from above the source-drain region; and
forming a doped epitaxial layer adjacent to the silicon-germanium channel region to form a raised source-drain region,
wherein forming the doped epitaxial layer comprises epitaxially growing in-situ boron doped silicon-germanium or in-situ boron doped silicon.
2. The method of claim 1 , wherein the germanium concertation of the silicon-germanium layer ranges from approximately 40% to approximately 60% of germanium.
3. The method of claim 1 , wherein annealing the semiconductor structure comprises conducting a high temperature anneal to accomplish a homogenous distribution of germanium atoms throughout the silicon-germanium channel region.
4. The method of claim 1 , wherein a dummy gate physically protects the channel region during diffusion of germanium atoms so that dimensions of the silicon-germanium channel region remain unvarying.
5. The method of claim 1 , wherein dimensions of the silicon-germanium channel region in a p-FET region are substantially the same as dimensions of a silicon channel region formed in a n-FET region.
6. The method of claim 1 , wherein growing the p-doped epitaxial layer comprises epitaxially growing an in-situ boron doped silicon-germanium material.
7. A method of forming a semiconductor structure, comprising:
epitaxially growing a silicon-germanium layer above a portion of a semiconductor substrate in a p-FET region not covered by a dummy gate, the silicon-germanium layer having a target concentration of germanium atoms;
annealing the semiconductor structure to a temperature sufficient to cause germanium atoms from the silicon-germanium layer to diffuse into a portion of the semiconductor substrate below the dummy gate to form a silicon-germanium channel region;
removing the silicon-germanium layer selective to the portion of the semiconductor substrate not covered by the dummy gate;
etching the portion of the semiconductor substrate not covered by the dummy gate to reduce a thickness of the portion of the semiconductor substrate not covered by the dummy gate; and
growing a p-doped epitaxial layer adjacent to the silicon-germanium channel region to form a raised source-drain region.
8. The method of claim 7 , wherein the germanium concertation of the silicon-germanium layer ranges from approximately 40% to approximately 60% of germanium.
9. The method of claim 7 , wherein annealing the semiconductor structure comprises conducting a high temperature anneal to accomplish a homogenous distribution of germanium atoms throughout the silicon-germanium channel region.
10. The method of claim 7 , wherein the dummy gate physically protects the channel region during diffusion of germanium atoms so that dimensions of the silicon-germanium channel region remain unvarying.
11. The method of claim 7 , wherein dimensions of the silicon-germanium channel region in the p-FET region are substantially the same as dimensions of a silicon channel region formed in a n-FET region.
12. The method of claim 7 , wherein growing the p-doped epitaxial layer comprises epitaxially growing an in-situ boron doped silicon-germanium material.
13. A method of forming a semiconductor structure, comprising:
epitaxially growing a silicon-germanium layer above a portion of a semiconductor substrate in a p-FET region not covered by a dummy gate;
annealing the semiconductor structure to a temperature sufficient to cause germanium atoms from the silicon-germanium layer to diffuse into a portion of the semiconductor substrate below the dummy gate to form a silicon-germanium channel region in the p-FET region;
removing the silicon-germanium layer selective to the semiconductor substrate; and
growing a p-doped epitaxial layer adjacent to the silicon-germanium channel region to form a raised source-drain region.
14. The method of claim 13 , wherein the germanium concertation of the silicon-germanium layer ranges from approximately 40% to approximately 60% of germanium.
15. The method of claim 13 , wherein annealing the semiconductor structure comprises conducting a high temperature anneal to accomplish a homogenous distribution of germanium atoms throughout the silicon-germanium channel region.
16. The method of claim 13 , wherein the dummy gate physically protects the channel region during diffusion of germanium atoms so that dimensions of the silicon-germanium channel region remain unvarying.
17. The method of claim 13 , wherein dimensions of the silicon-germanium channel region in the p-FET region are substantially the same as dimensions of a silicon channel region formed in a n-FET region.
18. The method of claim 13 , wherein growing the p-doped epitaxial layer comprises epitaxially growing an in-situ boron doped silicon-germanium material.