IP Library Granted Patent US 10,175,994
Granted Patent B2
US 10,175,994 · App. 15/402,666 · Granted Jan 8, 2019

System and method for execution of a secured environment initialization instruction

Inventors: James A. Sutton, II (Portland, OR); David W. Grawrock (Aloha, OR)
Assignee: Intel Corporation
G06F9/4403G01N23/223G01N33/502G01N33/6872G06F9/44505G06F12/0802G06F12/145G06F12/1458G06F13/4282G06F21/57G06F21/572H04L9/32H04L9/3247G01N2223/076G06F2212/1052G06F2212/60G06F2213/0026G06F2221/033
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Quick Facts
Patent No.
US 10,175,994
App. No.
15/402,666
Granted
Jan 8, 2019
Kind
B2
Abstract

A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.

Claims (6)

1. A computing system comprising:

a storage device to store a first secure module and a second secure module; and

a processor coupled to the storage device, the processor to establish a root of trust usable to ensure that subsequent operations can be trusted, wherein the processor is to execute the first secure module to initialize a secure processing environment and authenticate the second secure module, and wherein the processor is to execute the second secure module after being authenticated by the first secure module and after the root of trust has been established, the second secure module to prevent direct access to hardware resources in the secure processing environment from an untrusted operating system.

2. The computing system of claim 1 , further comprising a memory device coupled to the processor.

3. The computing system of claim 1 , further comprising a Universal Serial Bus (USB) interface coupled to the processor.

4. The computing system of claim 1 , further comprising a removable media interface coupled to the processor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →
Continuity (8)
Continuation 14864450 · Sep 24, 2015
Continuation 14222939 · Mar 24, 2014
Continuation 13835997 · Mar 15, 2013
Continuation 13444450 · Apr 11, 2012
Continuation 12455844 · Jun 8, 2009
Continuation 11096618 · Mar 31, 2005
Continuation 10112169 · Mar 29, 2002
Related Publication 20170147359A1 · May 25, 2017