IP Library Granted Patent US 10,211,840
Granted Patent B2
US 10,211,840 · App. 15/410,890 · Granted Feb 19, 2019

Charge pump driver circuit

Inventors: Pierre Pascal Savary (Fonsorbes, FR); Dominique Delbecq (Fonsorbes, FR); Birama Goumballa (Larra, FR)
Assignee: NXP USA, Inc.
H03L7/0896H03L7/0895H03L7/0898H03L7/183
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Quick Facts
Patent No.
US 10,211,840
App. No.
15/410,890
Granted
Feb 19, 2019
Kind
B2
Abstract

A charge pump driver circuit comprises an output stage and a current generator component. The output stage is arranged to receive at an input node thereof a control current signal and comprises a resistance network coupled between the input node thereof and a reference voltage node and arranged to provide a resistive path through which the control current signal flows. The output stage is arranged to generate at an output node thereof a charge pump control voltage signal based on the voltage level at the input node thereof. The current generator component is arranged to receive an indication of a voltage level of a charge pump output signal, and to generate a feedback current dependent on the voltage level of the output signal, wherein the feedback current is injected into the resistive path of the resistance network through which the control current signal flows.

Claims (45)

1. A charge pump driver circuit arranged to output a charge pump control voltage signal; the charge pump driver circuit comprising:

a control stage arranged to receive an input signal and to generate a control current signal in accordance with the input signal;

an output stage arranged to receive at an input node thereof the control current signal output by the control stage, the output stage comprising a resistance network coupled between the input node thereof and a reference voltage node and arranged to provide a resistive path through which the control current signal flows, and the output stage being arranged to generate at an output node thereof the charge pump control voltage signal based on the voltage level at the input node thereof; and

a current generator component arranged to receive an indication of a voltage level of a charge pump output signal, and to generate a feedback current dependent on the voltage level of the output signal, wherein the feedback current is injected into the resistive path of the resistance network through which the control current signal flows.

2. The charge pump driver circuit of claim 1 , wherein the current generator component is arranged to receive a configuration signal and to generate the feedback current further dependent on the configuration signal.

3. The charge pump driver circuit of claim 1 , wherein the resistive path of the resistance network through which the control current signal flows comprises at least one configurable resistive component.

4. The charge pump driver circuit of claim 1 , wherein:

the control stage is arranged to generate a differential current control signal comprising a first current component and a second current component;

the output stage is arranged to receive at a first input node thereof the first current component of the differential current control signal and receive at a second input node thereof the second current component of the differential current control signal;

the resistance network is coupled between each of the first and second input nodes and the reference voltage node and arranged to provide a first resistive path through which the first current component of the differential current control signal flows and a second resistive path through which the second current component of the differential current control signal flows;

the output stage is arranged to generate a first charge pump control voltage signal at a first output node thereof based on the voltage level at the first input node and a second charge pump control voltage signal at a second output node thereof based on the voltage level at the second input node; and

the feedback current generated by the current generator component is injected into the first and second resistive paths of the resistance network through which the first and second current components of the differential current control signal flow.

5. The charge pump driver circuit of claim 4 , wherein the first and second resistive paths share a common path section through which both the first and second current components of the differential current control signal flow, and the feedback current is injected into the common path section.

6. The charge pump driver circuit of claim 1 , wherein the current generator component is arranged to generate the feedback current comprising a positive slope amplitude profile with respect to the voltage level of the charge pump output signal.

7. A phase-locked loop, PLL, comprising a charge pump driver circuit according to claim 1 .

8. A method of generating a charge pump control voltage signal; the method comprising:

receiving an input signal and generating a control current signal n accordance with the input signal;

apply the reference current to a resistive path between an input node and a reference voltage node;

receiving an indication of a voltage level of a charge pump output signal and generating a feedback current dependent on the indicated voltage level of the output signal;

injecting the feedback current into the resistive path; and

generating the charge pump control voltage signal based on a voltage level at the input node.

9. The method of claim 8 further comprising receiving a configuration signal and generating the feedback current further dependent on the configuration signal.

10. The method of claim 8 further comprising configuring at least one resistive component within the resistive path.

11. The method of claim 8 , wherein the method comprises:

generating a differential current control signal comprising a first current component and a second current component;

applying the first current component of the differential current control signal to a first resistive path between a first input node and the reference voltage node;

applying the second current component of the differential current control signal to a second resistive path between a second input node and the reference voltage node;

injecting the feedback current into the first and second resistive paths; and

generating a first charge pump control voltage signal based on a voltage level at the first input node and a second charge pump control voltage signal based on a voltage level at the second input node.

12. The method of claim 11 , wherein the first and second resistive paths share a common path section through which both the first and second current components of the differential current control signal flow, and the method comprises injecting the feedback current into the common path section.

13. The method of claim 8 , wherein the method comprises generating the feedback current comprising a positive slope amplitude profile with respect to the voltage level of the charge pump output signal.

14. A phase-locked loop (PLL) comprising a charge pump driver circuit arranged to output a charge pump control voltage signal; the charge pump driver circuit comprising:

a control stage arranged to receive an input signal and to generate a control current signal in accordance with the input signal;

an output stage arranged to receive at an input node thereof the control current signal output by the control stage, the output stage comprising a resistance network coupled between the input node thereof and a reference voltage node and arranged to provide a resistive path through which the control current signal flows, and the output stage being arranged to generate at an output node thereof the charge pump control voltage signal based on the voltage level at the input node thereof; and

a current generator component arranged to receive an indication of a voltage level of a charge pump output signal, and to generate a feedback current dependent on the voltage level of the output signal, wherein the feedback current is injected into the resistive path of the resistance network through which the control current signal flows.

15. The PLL of claim 14 , wherein the current generator component is arranged to receive a configuration signal and to generate the feedback current further dependent on the configuration signal.

16. The PLL of claim 14 , wherein the resistive path of the resistance network through which the control current signal flows comprises at least one configurable resistive component.

17. The PLL of claim 14 , wherein:

the control stage is arranged to generate a differential current control signal comprising a first current component and a second current component;

the output stage is arranged to receive at a first input node thereof the first current component of the differential current control signal and receive at a second input node thereof the second current component of the differential current control signal;

the resistance network is coupled between each of the first and second input nodes and the reference voltage node and arranged to provide a first resistive path through which the first current component of the differential current control signal flows and a second resistive path through which the second current component of the differential current control signal flows;

the output stage is arranged to generate a first charge pump control voltage signal at a first output node thereof based on the voltage level at the first input node and a second charge pump control voltage signal at a second output node thereof based on the voltage level at the second input node; and

the feedback current generated by the current generator component is injected into the first and second resistive paths of the resistance network through which the first and second current components of the differential current control signal flow.

18. The PLL of claim 17 , wherein the first and second resistive paths share a common path section through which both the first and second current components of the differential current control signal flow, and the feedback current is injected into the common path section.

19. The PLL of claim 14 , wherein the current generator component is arranged to generate the feedback current comprising a positive slope amplitude profile with respect to the voltage level of the charge pump output signal.

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Nov 28, 2017
From: NXP SEMICONDUCTORS USA, INC.; FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 044231/0494 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 041023 FRAME: 0488. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Nov 28, 2017
From: SAVARY, PIERRE PASCAL; DELBECQ, DOMINIQUE; GOUMBALLA, BIRAMA
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 044511/0882 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2017
From: SAVARY, PIERRE PASCAL; DELBECQ, DOMINIQUE; GOUMBALLA, BIRAMA
To: NXP USA, INC.
Reel/Frame 041023/0488 →
Priority Claims (1)
EP 16305854 · Jul 7, 2016 · regional
Continuity (1)
Related Publication 20180013436A1 · Jan 11, 2018