Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains

1. A method of forming an active device having self-aligned source/drain contacts and gate contacts, comprising:

forming an active area on a substrate, where the active area includes a device channel;

forming two or more gate structures on the active area;

forming a plurality of source/drains on the top surface of the active area adjacent to the two or more gate structures and device channel, wherein at least one of the plurality of source/drains is between a pair of the two or more gate structures;

forming a protective layer on the sidewall surfaces of each of the two or more gate structures, on the sidewall surfaces of at least two of the plurality of source/drains, and on the active layer, wherein the protective layer has a thickness in the range of about 4 nm to about 15 nm;

forming an interlayer dielectric layer on the protective layer;

removing a portion of the interlayer dielectric and protective layer to form a plurality of openings, where each opening exposes at least a portion of one of the plurality of source/drains and a potion of the protective layer on one side of the opening, but not on an opposite side of the opening;

forming a source/drain contact liner in at least one of the plurality of openings, wherein the protective layer is between the source/drain contact liner and at least one of the two or more gate structures; and

forming a source/drain contact fill on the source/drain contact liner.

2. The method of claim 1 , further comprising removing a portion of the source/drain contact liner and source/drain contact fill formed in each opening to form a trough, and forming a source/drain contact cap in each trough.

3. The method of claim 2 , wherein each of the two or more gate structures includes a gate dielectric layer, a conductive gate fill, and a work function layer within a gate sidewall spacer, where the gate dielectric layer, conductive gate fill, and work function layer are covered by a gate structure cap.

4. The method of claim 3 , the source/drain contact cap and gate structure cap are silicon nitride (SiN), silicon oxynitride (SiON), a low-k dielectric, a high-k dielectric, silicon borocarbonitride (SiBCN), silicon oxycarbide (SiOC), silicon boro oxycarbide (SIBOC), or combinations thereof, and the source/drain contact cap is a different material from the gate structure cap.

5. The method of claim 4 , wherein the source/drain contact liner is a metal nitride.

6. The method of claim 3 , further comprising removing at least a portion of the gate structure cap to expose a portion of the gate structure, and forming a gate contact liner and gate contact layer on at least a portion of the conductive gate fill.

7. The method of claim 6 , further comprising removing the source/drain contact cap to reopen the trough, and forming an inner spacer in the trough.

8. The method of claim 6 , wherein the inner spacer is formed by a conformal deposition.

9. The method of claim 8 , wherein the inner spacer is a silicon nitride (SiN), silicon oxynitride (SiON), a low-k dielectric, a high-k dielectric, silicon borocarbonitride (SiBCN), silicon oxycarbide (SiOC), silicon boro oxycarbide (SIBOC), or combinations thereof.

10. A method of forming an active device having self-aligned source/drain contacts and gate contacts, comprising:

forming an active area on a substrate, where the active area includes a device channel;

forming two or more gate structures on the same active area, wherein each of the two or more gate structures includes a gate dielectric layer, a conductive gate fill, and a work function layer within a gate sidewall spacer, and the gate dielectric layer, conductive gate fill, and work function layer are covered by a gate structure cap;

forming a plurality of source/drains on the active area adjacent to the two or more gate structures and device channel, wherein at least one of the plurality of source/drains is between a pair of the two or more gate structures;

forming a protective layer on the sidewall surfaces of each of the two or more gate structures, on the sidewall surfaces of at least two of the plurality of source/drains, and on the active layer, wherein the protective layer has a thickness in the range of about 4 nm to about 15 nm;

forming an interlayer dielectric layer on the protective layer;

removing a portion of the interlayer dielectric and protective layer to form a plurality of openings, where each opening exposes at least a portion of one of the plurality of source/drains and a potion of the protective layer on one side of the opening, but not on an opposite side of the opening;

forming a source/drain contact liner in at least one of the plurality of openings, wherein the protective layer is between the source/drain contact liner and the gate sidewall spacer on one of the two or more gate structures; and

forming a source/drain contact fill on the source/drain contact liner.

11. The method of claim 10 , wherein the gate sidewall spacer has a thickness in the range of about 4 nm to about 15 nm.

12. The method of claim 10 , further comprising removing at least a portion of the gate structure cap to expose a portion of the gate structure, and forming a gate contact liner and gate contact layer on at least a portion of the conductive gate fill.

13. The method of claim 12 , wherein the gate contact layer is tungsten (W), titanium (Ti), molybdenum (Mo), cobalt (Co), a conductive carbon material, or a suitable combinations thereof.