IP Library › Granted Patent US 10,627,888
Granted Patent B2
US 10,627,888 · App. 15/419,574 · Granted Apr 21, 2020

Processor power-saving during wait events

Inventors: Raymond M. Higgs (Poughkeepsie, NY); Luke M. Hopkins (Peterborough, NH); Mushfiq Saleheen (Poughkeepsie, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G06F1/3234G06F1/206G06F1/3206G06F1/3209G06F1/3287Y02D10/171
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,627,888
App. No.
15/419,574
Granted
Apr 21, 2020
Kind
B2
Abstract

Embodiments are directed to a method of optimizing power consumption in an electrical device. The method includes receiving, by a processor, instructions to enter a wait state, and identifying, by the processor, a parameter associated with the instructions to enter a wait state. The method continues with initiating, by the processor, instructions to enter a low-power mode based on the parameter, initiating, by the processor, instructions to exit a low-power mode based on the parameter, and providing, via a user interface, a user with notice of a current state of the processor. The parameter includes runtime information, instructional information, and scheduled operations.

Claims (37)

1. A method of optimizing power consumption in an electrical device, the method comprising:

receiving, by a processor, instructions to enter a wait state, wherein the instructions include a sleep decision index comprising a sleep operation code, a parameter and a state;

monitoring, by the processor, the parameter specified by the sleep decision index;

initiating, by the processor, instructions to enter a low-power mode based on a determination that the parameter has met a value specified by the sleep decision index, wherein the value is determined based on a history of previous events or states and wherein the determination is based on applying an algorithm specified by the sleep operation code to the parameter;

initiating, by the processor, instructions to exit the low-power mode based on the parameter; and

providing, via a user interface, a user with notice of a current state.

2. The method of claim 1 , wherein the parameter includes dynamically changing thresholds based on a history of previous events or states.

3. The method of claim 1 , wherein the instructions to enter and exit a low-power mode are sent to predetermined circuits in the electrical device.

4. The method of claim 1 , wherein the processor contains a predetermined set of instructions to enter and exit a low-power mode based on the parameter identified.

5. The method of claim 1 , wherein the parameter is accessed from a remote location.

6. The method of claim 1 , wherein the instructions to enter and exit a low-power mode include delaying, for a predetermined time, a start of an event.

7. The method of claim 1 , wherein the instructions to enter a low-power mode include, after a predetermined time period, ordering a hardware device to transition from a low-power mode to routine operations.

8. The method of claim 1 , wherein the parameter can be passed as operands of the instructions.

9. The method of claim 1 , wherein the instructions to enter and exit a low-power mode include executing a delaying action for a predetermined amount of time before entering or exiting a low-power mode.

10. The method of claim 1 , wherein the algorithm specifies entering the low-power mode based on a determination that the parameter, which contains an exponential moving average of wait event times for an instruction, exceeds a threshold.

11. The method of claim 10 , wherein the algorithm further includes a time delay for exiting the low-power mode.

12. A system, comprising:

a memory having computer readable instructions; and

a processor for executing the computer readable instructions, the computer readable instructions including:

receiving instructions to enter a wait state, wherein the instructions include a sleep decision index comprising a sleep operation code, a parameter and a state;

monitoring a parameter specified by the sleep decision index to enter a wait state;

initiating instructions to enter a low-power mode based on a determination that the parameter has met a value specified by the sleep decision index, wherein the value is determined based on a history of previous events or states and wherein the determination is based on applying an algorithm specified by the sleep operation code to the parameter;

initiating instructions to exit a low-power mode based on the parameter; and

providing, via a user interface, a user with notice of a current state.

13. The system of claim 12 , wherein the instructions to enter and exit a low-power mode are sent to predetermined circuits in the electrical device.

14. The system of claim 12 , wherein the processor contains a predetermined set of instructions to enter and exit a low-power mode based on the parameter identified.

15. The system of claim 12 , wherein the instructions to enter and exit a low-power mode include delaying, for a predetermined time, a start of an event.

16. The system of claim 12 , wherein the instructions to enter a low-power mode include executing a delaying action for a predetermined amount of time before entering a low-power mode.

17. A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a computer processor to cause the computer processor to perform a method comprising:

receiving, by a processor, instructions to enter a wait state, wherein the instructions include a sleep decision index comprising a sleep operation code, a parameter and a state;

monitoring, by the processor, a parameter specified by the sleep decision index to enter a wait state;

initiating instructions to enter a low-power mode based on a determination that the parameter has met a value specified by the sleep decision index, wherein the value is determined based on a history of previous events or states and wherein the determination is based on applying an algorithm specified by the sleep operation code to the parameter;

initiating instructions to exit a low-power mode based on the parameter; and

providing, via a user interface, a user with notice of a current state.

18. The computer program product of claim 17 , wherein the instructions to enter and exit a low-power mode are sent to predetermined circuits in the electrical device.

19. The computer program product of claim 17 , wherein the processor contains a predetermined set of instructions to enter and exit a low-power mode based on the parameter identified.

20. The computer program product of claim 17 , wherein the instructions to enter and exit a low-power mode include delaying, for a predetermined time, a start of an event.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2026
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: KIDON IP CORPORATION
Reel/Frame 074125/0530 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2026
From: KIDON IP CORPORATION
To: CAPROCK INTEGRATED TECHNOLOGIES LLC
Reel/Frame 073866/0504 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2026
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: KIDON IP CORPORATION
Reel/Frame 074975/0477 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2017
From: HIGGS, RAYMOND M.; HOPKINS, LUKE M.; SALEHEEN, MUSHFIQ
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 041128/0929 →
Continuity (1)
Related Publication 20180217655A1 · Aug 2, 2018