UNIDIRECTIONAL CLOCK SIGNALING IN A HIGH-SPEED SERIAL LINK
Transmission of data over a serial link based on a unidirectional clock signal is provided. A unidirectional clock signal is generated based on a first clock of a master device. The unidirectional clock signal is sent to a slave device that is connected to the serial link. The master device transmits data to the slave device over the serial link based on the first clock. The slave device receives the unidirectional clock signal from a master device. The slave device transmits data over the serial link to the master device based on the unidirectional clock signal.
1 . A method of a master device for transmission of data over a serial link using a unidirectional clock signal, the method comprising:
generating the unidirectional clock signal based on a first clock of the master device;
sending the unidirectional clock signal to a slave device that is connected to the serial link; and
transmitting data to the slave device over the serial link based on the first clock.
2 . The method of claim 1 , wherein the unidirectional clock is generated to have a same rate as the first clock.
3 . The method of claim 1 , wherein the unidirectional clock signal is generated such that a rate of the unidirectional clock signal is a fraction of a rate of the first clock.
4 . The method of claim 1 , wherein the unidirectional clock signal is sent over the serial link to the slave device.
5 . The method of claim 1 , wherein the unidirectional clock signal is sent over a sideband to the slave device.
6 . A method of a slave device for transmission of data over a serial link using a unidirectional clock signal, the method comprising:
receiving the unidirectional clock signal from a master device, wherein the unidirectional clock signal is based on a first clock of the master device; and
transmitting data over the serial link to the master device based on the unidirectional clock signal.
7 . The method of claim 6 , wherein a rate of the unidirectional clock is the same as a rate of the first clock.
8 . The method of claim 6 , wherein a rate of the unidirectional clock signal is a fraction of a rate of the first clock.
9 . The method of claim 6 , wherein the unidirectional clock signal is received over the serial link from the master device.
10 . The method of claim 6 , wherein the unidirectional clock signal is received over a sideband from the master device.
11 . An apparatus that transmits data over a serial link using a unidirectional clock signal, the apparatus comprising:
a master device including
a first clock,
a clock signal generator that generates the unidirectional clock signal based on the first clock, and
a transmitter component that sends the unidirectional clock signal to a slave device that is connected to the serial link and that transmits data to the slave device over the serial link based on the first clock.
12 . The apparatus of claim 11 , wherein the clock signal generator generates the unidirectional clock to have a same rate as the first clock.
13 . The apparatus of claim 11 , wherein the clock signal generator generates the unidirectional clock such that a rate of the unidirectional clock signal is a fraction of a rate of the first clock.
14 . The apparatus of claim 11 , wherein the transmitter component transmits the unidirectional clock signal over the serial link to the slave device.
15 . The apparatus of claim 11 , wherein the transmitter component transmits the unidirectional clock signal over a sideband to the slave device.
16 . An apparatus that transmits data over a serial link using a unidirectional clock signal, the apparatus comprising:
a slave device including
a receiver that receives the unidirectional clock signal from a master device, wherein the unidirectional clock signal is based on a first clock of the master device, and
a transmitter that transmits data over the serial link to the master device based on the unidirectional clock signal.
17 . The apparatus of claim 16 , wherein a rate of the unidirectional clock is the same as a rate of the first clock.
18 . The apparatus of claim 16 , wherein a rate of the unidirectional clock signal is a fraction of a rate of the first clock.
19 . The apparatus of claim 16 , wherein the receiver receives the unidirectional clock signal over the serial link from the master device.
20 . The apparatus of claim 16 , wherein the receiver receives the unidirectional clock signal over a sideband from the master device.