IP Library › Granted Patent US 9,960,269
Granted Patent B2
US 9,960,269 · App. 15/421,920 · Granted May 1, 2018

Semiconductor device and method of manufacturing the same

Inventors: Hiroshi Yanagigawa (Hitachinaka, JP); Hiroyoshi Kudou (Hitachinaka, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H01L29/7813H01L21/26513H01L29/1095H01L29/4236H01L29/66712
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Quick Facts
Patent No.
US 9,960,269
App. No.
15/421,920
Granted
May 1, 2018
Kind
B2
Abstract

A semiconductor device according to one embodiment includes a semiconductor substrate having a main surface and a back surface opposite to the main surface, a drift region of a first conductivity type, a base region of a second conductivity type, a source region of the first conductivity type, and a gate electrode. The semiconductor substrate has a trench in the main surface. The gate electrode is formed in the trench. A distribution of an impurity concentration in the base region has a plurality of peak values along a direction of depth from the main surface toward the back surface, and the number of peak values is four or more.

Claims (37)

1. A semiconductor device comprising:

a semiconductor substrate having a main surface and a back surface opposite to the main surface;

a drift region of a first conductivity type disposed in the semiconductor substrate;

a base region of a second conductivity type disposed in the semiconductor substrate on a side of the main surface relative to the drift region;

a source region of the first conductivity type disposed in the semiconductor substrate on the side of the main surface relative to the drift region such that the base region lies between the source region and the drift region; and

a gate electrode disposed in the base region lying between the source region and the drift region, with the gate electrode being insulated from the base region,

the semiconductor substrate having a trench in the main surface,

the gate electrode being formed in the trench,

a distribution of an impurity concentration in the base region having a plurality of peak values along a direction of a depth from the main surface toward the back surface, and

the number of peak values being four or more, wherein

the semiconductor device further comprises a column region of the second conductivity type extending from the base region toward the back surface in the semiconductor substrate,

an impurity concentration in the column region is higher than any of the plurality of peak values in the distribution of the impurity concentration in the base region, and

the plurality of peak values in the distribution of the impurity concentration in the base region are closer to the impurity concentration in the column region as a distance from the main surface is greater.

2. The semiconductor device according to claim 1 , wherein

the drift region has an impurity concentration not lower than 1×10 16 /cm 3 and not higher than 1×10 17 /cm 3 .

3. The semiconductor device according to claim 1 , wherein

the column region includes a first end which is an end on a side of the base region and a second end which is an end opposite to the first end, and

an impurity concentration in the column region attains to a maximum at the first end.

4. The semiconductor device according to claim 3 , wherein

the impurity concentration in the column region lowers as a distance from the first end is greater.

5. The semiconductor device according to claim 1 , wherein

the column region includes a first end which is an end on a side of the base region and a second end which is an end opposite to the first end, and

an impurity concentration in the column region attains to a minimum at a position between the first end and the second end, becomes higher from the position between the first end and the second end toward the first end, and does not attain to a maximum at the first end.

6. The semiconductor device according to claim 1 , wherein

the base region has a depth not smaller than 1.0 μm and not greater than 2.0 μm.

7. The semiconductor device according to claim 6 , wherein

the base region has the depth not smaller than 1.5 μm and not greater than 2.0 μm.

8. The semiconductor device according to claim 1 , wherein

a peak value other than the peak value located closest to the main surface is maximum of the plurality of peak values in the distribution of the impurity concentration in the base region.

9. The semiconductor device according to claim 8 , wherein

the plurality of peak values in the distribution of the impurity concentration in the base region exhibit increase with a greater distance from the main surface.

10. The semiconductor device according to claim 9 , wherein

the plurality of peak values in the distribution of the impurity concentration in the base region exhibit linear increase in accordance with a distance from the main surface.

11. The semiconductor device according to claim 10 , wherein

positions where the plurality of peak values are attained in the distribution of the impurity concentration in the base region are disposed at an equal interval along the direction of depth.

12. The semiconductor device according to claim 1 , wherein

the semiconductor substrate has a back gate region formed as being in contact with the main surface above the drift region and surrounded by the source regions.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: YANAGIGAWA, HIROSHI; KUDOU, HIROYOSHI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 041147/0281 →
Priority Claims (2)
JP 2016-018246 · Feb 2, 2016 · national
JP 2016-162648 · Aug 23, 2016 · national
Continuity (1)
Related Publication 20170222039A1 · Aug 3, 2017