IP Library › Granted Patent US 10,516,054
Granted Patent B2
US 10,516,054 · App. 15/423,035 · Granted Dec 24, 2019

Electronic device including two-dimensional material

Inventors: Seunggeol Nam (Suwon-si, KR); Wonjong Yoo (Suwon-si, KR); Zheng Yang (Suwon-si, KR)
Assignees: Research & Business Foundation Sungkyunkwan University; Samsung Electronics Co., Ltd.
H01L29/78618H01L29/24H01L29/45H01L29/66969H01L29/778H01L29/78681H01L29/78696H01L29/861
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Quick Facts
Patent No.
US 10,516,054
App. No.
15/423,035
Granted
Dec 24, 2019
Kind
B2
Abstract

Provided are electronic devices having a two-dimensional (2D) material layer. The electronic device includes an electrode layer that directly contacts an edge of the 2D material layer. The electrode layer may include a conductive material having a high work function or may have a structure in which an electrode layer includes a conductive material having a high work function and an electrode layer includes a conductive material having a low work function.

Claims (33)

1. An electronic device comprising:

a gate electrode;

a gate insulating layer on the gate electrode;

a two-dimensional (2D) material layer on the gate insulating layer above the gate electrode;

an insulating layer on the 2D material layer, the insulating layer including an opening that exposes the 2D material layer, wherein the insulating layer includes one of h-BN and Al 2 O 3 ; and

an electrode layer contacting an edge of the 2D material layer, the electrode layer having a high work function, the electrode layer being configured to cause a p-type characteristic in the 2D material layer without doping the 2D material layer, the electrode layer directly contacting the edge of the 2D material layer through the opening in the insulating layer.

2. The electronic device of claim 1 , wherein the electrode layer has a work function in a range from 5.0 eV to 6.5 eV.

3. The electronic device of claim 1 , wherein

the electrode layer is on a surface of the gate insulating layer.

4. The electronic device of claim 3 , wherein

the electrode layer includes a first electrode layer and a second electrode layer respectively,

the opening in they insulating layer includes a first opening and a second opening that are separate from each other,

the first electrode layer and the second electrode layer directly contact edges of the 2D material layer on the surface of the gate insulating layer.

5. The electronic device of claim 1 , wherein the 2D material layer includes a transition metal chalcogenide based material.

6. The electronic device of claim 5 , wherein the 2D material layer includes one of MoS 2 , MoSe 2 , MoTe 2 , WS 2 , WSe 2 , WTe 2 , ZrS 2 , ZrSe 2 , HfS 2 , HfSe 2 , NbSe 2 , and ReSe 2 .

7. The electronic device of claim 1 , wherein the insulating layer includes h-BN.

8. The electronic device of claim 1 , wherein

the electrode layer includes a first electrode layer and a second electrode layer, respectively,

the first electrode layer and the second electrode layer contact edges of the 2D material layer and have work functions that are different from each other.

9. The electronic device of claim 8 , wherein

the first electrode layer has a work function greater than 3 eV and less than 5 eV, and

the second electrode layer has a work function in a range from 5.0 eV to 6.5 eV.

10. The electronic device of claim 9 , wherein

an n-type contact region on a region where the first electrode layer contacts a first one of the edges of the 2D material layer, and

a p-type contact region is arranged on a region where the second electrode layer contacts a second one of the edges of the 2D material layer.

11. The electronic device of claim 8 , wherein the 2D material layer includes a transition metal chalcogenide based material.

12. The electronic device of claim 8 , wherein the 2D material layer includes one of MoS 2 , MoSe 2 , MoTe 2 , WS 2 , WSe 2 , WTe 2 , ZrS 2 , ZrSe 2 , HfS 2 , HfSe 2 , NbSe 2 , and ReSe 2 .

13. The electronic device of claim 1 , wherein the insulating layer includes Al 2 O 3 .

14. The electronic device of claim 1 , wherein a bottom surface of the electrode layer is on top of a top surface of the gate insulating layer.

15. The electronic device of claim 8 , wherein a bottom surface of the electrode layer is on top of a top surface of the gate insulating layer.

16. The electronic device of claim 9 , wherein

the first electrode layer is configured to impart an n-type characteristic in a first region of the 2D material layer that contacts the first electrode layer, and

the second electrode layer is configured to impart a p-type characteristic in a second region of the 2D material layer that contacts the second electrode layer without doping the 2D material layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2017
From: NAM, SEUNGGEOL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 041175/0174 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2017
From: YOO, WONJONG; YANG, ZHENG
To: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
Reel/Frame 041175/0202 →
Priority Claims (1)
KR 10-2016-0099620 · Aug 4, 2016 · national
Continuity (1)
Related Publication 20180040737A1 · Feb 8, 2018