IP Library Granted Patent US 10,020,784
Granted Patent B1
US 10,020,784 · App. 15/442,801 · Granted Jul 10, 2018

Broadband differential trans-impedance amplifier (TIA)

Inventors: Kenn Christensen (Roskilde, DK); Steen Bak Christensen (Roskilde, DK)
Assignee: MELLANOX TECHNOLOGIES DENMARK APS
H03F3/45475H03F2203/45022H03F2203/45288
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Quick Facts
Patent No.
US 10,020,784
App. No.
15/442,801
Granted
Jul 10, 2018
Kind
B1
Abstract

A TIA includes first and second input terminals for differentially receiving an input current signal, and first and second amplification circuits. The first amplification circuit includes a first Alternating-Current (AC) path and a first Direct-Current (DC) path that are configured to amplify in parallel respective first AC and DC components of the input current signal flowing via the first input terminal, and a first combiner configured to sum the amplified first AC and DC components. The second amplification circuit includes a second AC path and a second DC path that are configured to amplify in parallel respective second AC and DC components of the input current signal flowing via the second input terminal, and a second combiner configured to sum the amplified second AC and DC components. First and second output terminals are configured for outputting an output voltage signal formed between outputs of the first and second combiners.

Claims (26)

1. A Trans-Impedance Amplifier (TIA), comprising:

first and second input terminals, for differentially receiving an input current signal;

a first amplification circuit, which comprises a first Alternating-Current (AC) path and a first Direct-Current (DC) path that are configured to amplify in parallel respective first AC and DC components of the input current signal flowing via the first input terminal, and a first combiner configured to sum the amplified first AC and DC components;

a second amplification circuit, which comprises a second AC path and a second DC path that are configured to amplify in parallel respective second AC and DC components of the input current signal flowing via the second input terminal, and a second combiner configured to sum the amplified second AC and DC components; and

first and second output terminals, for outputting an output voltage signal formed between outputs of the first and second combiners.

2. The TIA according to claim 1 , wherein the first AC path and the first DC path are gain-matched to one another, and the second AC path and the second DC path are gain-matched to one another.

3. The TIA according to claim 1 , and comprising a differential voltage amplifier, which is shared by the first and second DC paths and is configured to differentially amplify the first and second DC components.

4. The TIA according to claim 3 , wherein the first and second DC paths comprise respective first and second voltage sources, which are configured to set first and second inputs of the differential voltage amplifier to respective DC voltage levels.

5. The TIA according to claim 4 , wherein the first and second voltage sources are connected with opposite polarities to the first and second inputs of the differential voltage amplifier.

6. The TIA according to claim 4 , and comprising control circuitry that is configured to adapt respective voltages of the first and second voltage sources, so as to minimize an average of the output voltage signal.

7. The TIA according to claim 1 , wherein the first and second DC paths comprise respective first and second single-ended voltage amplifiers configured to amplify the first and second DC components.

8. The TIA according to claim 1 , wherein the first input terminal is connected via a first bias resistor to a supply voltage, and the second input terminal is connected via a second bias resistor to ground.

9. The TIA according to claim 8 , wherein resistances of the first and second bias resistors are externally programmable.

10. A method for amplification, comprising:

receiving an input current signal differentially in first and second input terminals;

using a first amplification circuit, which comprises a first Alternating-Current (AC) path and a first Direct-Current (DC) path, amplifying in parallel respective first AC and DC components of the input current signal flowing via the first input terminal, and summing the amplified first AC and DC components using a first combiner;

using a second amplification circuit, which comprises a second AC path and a second DC path, amplifying in parallel respective second AC and DC components of the input current signal flowing via the second input terminal, and summing the amplified second AC and DC components using a second combiner; and

generating an output voltage signal formed between outputs of the first and second combiners.

11. The method according to claim 10 , wherein the first AC path and the first DC path are gain-matched to one another, and the second AC path and the second DC path are gain-matched to one another.

12. The method according to claim 10 , wherein amplifying the DC components comprises differentially amplifying the first and second DC components by a differential voltage amplifier that is shared by the first and second DC paths.

13. The method according to claim 12 , and comprising setting first and second inputs of the differential voltage amplifier to respective DC voltage levels by respective first and second voltage sources.

14. The method according to claim 13 , wherein the first and second voltage sources are connected with opposite polarities to the first and second inputs of the differential voltage amplifier.

15. The method according to claim 13 , and comprising adapting respective voltages of the first and second voltage sources, so as to minimize an average of the output voltage signal.

16. The method according to claim 10 , wherein amplifying the DC components comprises amplifying the first and second DC components by respective first and second single-ended voltage amplifiers.

17. The method according to claim 10 , wherein the first input terminal is connected via a first bias resistor to a supply voltage, and the second input terminal is connected via a second bias resistor to ground.

18. The method according to claim 17 , and comprising externally programming resistances of the first and second bias resistors.

Assignments (2)
CHANGE OF NAME Recorded Jun 19, 2023
From: MELLANOX TECHNOLOGIES DENMARK APS
To: NVIDIA DENMARK APS
Reel/Frame 064021/0369 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2017
From: CHRISTENSEN, KENN; CHRISTENSEN, STEEN BAK
To: MELLANOX TECHNOLOGIES DENMARK APS
Reel/Frame 041820/0286 →
Cited By (3)
US 12,191,915 US 12,542,517 US 12,556,287