Methods and systems of reducing charge pump substrate noise
Methods and systems of reducing a substrate noise in a charge pump having a flying capacitor are provided. An input node of the flying capacitor is pre-charged at a first slew rate. The input node of the flying capacitor is charged at a second slew rate that is faster than the first slew rate. The input node of the flying capacitor is pre-discharged at a third slew rate. The input node of the flying capacitor is discharged at a fourth slew rate that is faster than the first slew rate.
1. A charge pump, comprising:
a flying capacitor coupled between a drive node and an output;
a first drive switch coupled between a first supply and the drive node and operative to charge the flying capacitor;
a second drive switch coupled between a second supply and the drive node and operative to discharge the flying capacitor;
a third switch coupled between the first supply and the drive node and operative to pre-charge the drive node; and
a fourth switch coupled between the second supply and the drive node and operative to pre-discharge the drive node, wherein a slew rate of the third switch is slower than a slew rate of the first switch.
2. The charge pump of claim 1 , wherein the third switch is configured to be turned ON before the first switch is turned ON.
3. The charge pump of claim 2 , wherein the third switch is configured to be kept ON while the first switch is ON.
4. The charge pump of claim 1 , wherein the fourth switch is configured to be turned ON before the second switch is turned ON.
5. The charge pump of claim 4 , wherein the fourth switch is configured to be kept ON while the second switch is ON.
6. The charge pump of claim 1 , further comprising:
a first current source coupled between the first supply and the drive node; and
a second current source coupled between the second supply and the fourth switch.
7. The charge pump of claim 1 , wherein a slew rate of the fourth switch is slower than a slew rate of the second switch.
8. The charge pump of claim 1 , wherein a current I 1 through the third switch and a current I 2 through the second switch is based on:
a parasitic capacitance C p at the drive node;
the first supply Vs+;
the second supply Vs−; and
an inverse of a period of the first and second drive switches, wherein,
I 1 and I 2 ≥4× C p ( V S+ −V S− )× F osc .