Electronic junction device with a reduced recovery time for applications subject to the current recirculation phenomenon and related manufacturing process

1. An integrated electronic device comprising:

a semiconductor body;

a first electrode region, having a first type of conductivity, in said semiconductor body;

a second electrode region having a second type of conductivity in said semiconductor body, the second electrode region forming a junction with the first electrode region; and

a nanostructured semiconductor region which extends in one of said first and second electrode regions, wherein:

said semiconductor body has a front surface;

said first electrode region forms a body region of a MOSFET; and

said second electrode region includes a first conductive region of the MOSFET, the first conductive region being a drain region or a source region.

2. The device according to claim 1 , wherein the first and second electrode regions have, respectively, a first minimum doping level and a second minimum doping level, said second minimum doping level being lower than the first minimum doping level; and wherein said nanostructured semiconductor region extends in the second electrode region.

3. The device according to claim 2 , wherein said second electrode region includes at least:

a first subregion arranged at a distance from said first electrode region; and

a second subregion, which is arranged between the first subregion and the first electrode region and contacts the first subregion and the first electrode region, said second subregion having a doping level equal to said second minimum doping level; and wherein said nanostructured semiconductor region extends at least in part within said second subregion.

4. The device according to claim 3 , wherein said nanostructured semiconductor region extends entirely within said second subregion.

5. The device according to claim 1 , comprising an insulation region of dielectric material, which extends within said second electrode region and is laterally spaced apart from said first electrode region; and wherein said nanostructured semiconductor region extends underneath and in direct contact with said insulation region.

6. The device according to claim 5 , wherein:

said insulation region is arranged between said body region and said first conductive region.

7. The device according to claim 1 , wherein the MOSFET includes:

a second conductive region adjacent to the body region, the second conductive region being a drain region or a source region;

a conductive gate; and

a gate dielectric positioned between the conductive gate and the body region.

8. An output stage, comprising:

an inductor; and

a control stage configured to control current flow in the inductor, the control stage including an integrated electronic device that includes:

a semiconductor body;

a first electrode region, having a first type of conductivity, in said semiconductor body;

a second electrode region having a second type of conductivity in said semiconductor body, the second electrode region forming a junction with the first electrode region; and

a nanostructured semiconductor region which extends in one of said first and second electrode regions, wherein:

the first and second electrode regions have, respectively, a first doping level and a second doping level, said second doping level being lower than the first doping level:

said nanostructured semiconductor region extends in the second electrode region:

said second electrode region includes at least a first subregion arranged at a distance from said first electrode region; and a second subregion, which is arranged between the first subregion and the first electrode region and contacts the first subregion and the first electrode region;

said second subregion has a doping level equal to said second doping level; and

said nanostructured semiconductor region extends at least in part within said second sub ion.

9. The output stage according to claim 8 , further comprising an insulation region of dielectric material, which extends within said second electrode region and is laterally spaced apart from said first electrode region; and wherein said nanostructured semiconductor region extends underneath and in direct contact with said insulation region.

10. The output stage according to claim 8 , wherein:

the semiconductor body has a front surface;

the first electrode region forms a body region of a MOSFET;

the second electrode region includes a first conductive region of the MOSFET, the first conductive region being a drain region or a source region;

the MOSFET includes:

a second conductive region adjacent to the body region, the second conductive region being a drain region or a source region;

a conductive gate; and

a gate dielectric positioned between the conductive gate and the body region.

11. The device according to claim 10 , further comprising an insulation region of dielectric material, which extends within said second electrode region and is laterally spaced apart from said first electrode region; and wherein:

said nanostructured semiconductor region extends underneath and in direct contact with said insulation region; and

said insulation region is arranged between said body region and said first conductive region.

12. An integrated electronic device comprising:

a semiconductor body;

a first electrode region, having a first type of conductivity and a first doping level, in said semiconductor body;

a second electrode region having a second type of conductivity in said semiconductor body, the second electrode region forming a junction with the first electrode region;

a nanostructured semiconductor region which extends in one of said first and second electrode regions, wherein the second electrode region includes at least:

a first subregion arranged at a distance from said first electrode region; and

a second subregion arranged between the first subregion and the first electrode region and contacts the first subregion and the first electrode region, said second subregion having a second doping level that is less than the first doping level and less than a third doping level of the first subregion; and wherein the nanostructured semiconductor region extends at least in part within said second subregion.

13. The device according to claim 11 , wherein the nanostructured semiconductor region extends entirely within said second subregion.

14. The device according to claim 11 , further comprising an insulation region of dielectric material, which extends within said second electrode region and is laterally spaced apart from said first electrode region; and wherein said nanostructured semiconductor region extends underneath and in direct contact with said insulation region.

15. The device according to claim 11 , wherein:

the semiconductor body has a front surface;

the first electrode region forms a body region of a MOSFET;

the second electrode region includes a first conductive region of the MOSFET, the first conductive region being a drain region or a source region;

the MOSFET includes:

a second conductive region adjacent to the body region, the second conductive region being a drain region or a source region;

a conductive gate; and

a gate dielectric positioned between the conductive gate and the body region.

16. The device according to claim 15 , further comprising an insulation region of dielectric material, which extends within said second electrode region and is laterally spaced apart from said first electrode region; and wherein:

said nanostructured semiconductor region extends underneath and in direct contact with said insulation region; and

said insulation region is arranged between said body region and said first conductive region.