Methods and systems for high bandwidth communications interface
Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between a transmitting device and a receiving device operating at high speed with low power utilization. Communication is performed using group signaling over sets of four wires using a vector signaling code, where each wire of a set carries a low-swing signal that may take on one of four signal values. Topologies and designs of wire sets are disclosed with preferred characteristics for group signaling communications.
1. A method comprising:
receiving symbols of a codeword of a balanced vector signaling code via wires of a multi-wire bus;
introducing, via a respective signal summation node on each wire of the multi-wire bus, a corresponding correction signal for each wire, the correction signal generated based on a re-encoded symbol of a re-encoded codeword, the re-encoded codeword obtained by re-encoding a previously-decoded codeword;
forming a plurality of output signals using a plurality of multi-input comparators, each output signal formed by a respective multi-input comparator forming a respective weighted combination of the received symbols of the codeword, the respective weighted combination determined by a corresponding vector of an orthogonal matrix;
forming a plurality of output data bits from the plurality of output signals; and
generating a re-encoded codeword based on the plurality of output data bits for use in a set of symbols of a codeword received in a subsequent unit interval.
2. The method of claim 1 , wherein the symbols of the codeword of the balanced vector signaling code have symbol values selected from the set {±1/3, ±1}.
3. The method of claim 2 , wherein the codeword is a permutation of ±[1, −1/3, −1/3, −1/3].
4. The method of claim 1 , wherein the orthogonal matrix is a Hadamard matrix.
5. The method of claim 4 , wherein the Hadamard matrix is represented as:
H
4
=
[
+
1
+
1
+
1
+
1
+
1
-
1
+
1
-
1
+
1
+
1
-
1
-
1
+
1
-
1
-
1
+
1
]
,
and wherein the respective weighted combinations are represented by respective column vectors that sum to zero.
6. The method of claim 1 , wherein forming the respective combination comprises:
obtaining a respective first sum of a first selected pair of symbols;
obtaining a respective second sum of a second selected pair of symbols; and
comparing the respective first sum and the respective second sum to obtain the respective output signal.
7. The method of claim 1 , wherein the symbols of the re-encoded codeword are digital symbols.
8. The method of claim 1 , wherein each correction signal has one of at least four possible values.
9. The method of claim 1 , further comprising combining un-rolled decision-feedback equalization (DFE) with the plurality of output signals prior to generating the re-encoded codeword.
10. An apparatus comprising:
a set of summation nodes, each summation node configured to receive a respective symbol of a codeword of a balanced vector signaling code via a respective wire of a multi-wire bus and to responsively introduce a corresponding correction signal into the respective wire, the correction signal representing a re-encoded symbol of a re-encoded codeword, the re-encoded codeword obtained by re-encoding a previously-decoded codeword;
a plurality of multi-input comparators configured to form a plurality of output signals, each multi-input comparator configured to form a respective output signal by forming a respective weighted combination of the received symbols of the codeword, the respective weighted combination determined by a corresponding vector of an orthogonal matrix;
a plurality of slicers configured to receive the plurality of output signals and to responsively generate a plurality of output data bits; and
an encoder configured to generate a re-encoded codeword based on the output data bits for use in a set of symbols of a codeword received in a subsequent unit interval.
11. The apparatus of claim 10 , wherein the symbols of the codeword of the balanced vector signaling code have symbol values selected from the set {±1/3, ±1}.
12. The apparatus of claim 11 , wherein the codeword is a permutation of ±[1, −1/3, −1/3, −1/3].
13. The apparatus of claim 10 , wherein the orthogonal matrix is a Hadamard matrix.
14. The apparatus of claim 13 , wherein the Hadamard matrix is represented as:
H
4
=
[
+
1
+
1
+
1
+
1
+
1
-
1
+
1
-
1
+
1
+
1
-
1
-
1
+
1
-
1
-
1
+
1
]
,
and wherein the respective weighted combinations are represented by respective column vectors that sum to zero.
15. The apparatus of claim 10 , wherein the multi-input comparators are configured to:
obtain a respective first sum of a first selected pair of symbols;
obtain a respective second sum of a second selected pair of symbols; and
compare the respective first sum and the respective second sum to obtain the respective output signal.
16. The apparatus of claim 10 , wherein the symbols of the re-encoded codeword are digital symbols.
17. The apparatus of claim 10 , wherein each correction signal has one of at least four possible values.
18. The apparatus of claim 10 , further comprising un-rolled decision-feedback equalization (DFE) circuits configured to perform unrolled DFE on the plurality of output signals prior to generating the re-encoded codeword.