IP Library Granted Patent US 10,090,322
Granted Patent B2
US 10,090,322 · App. 15/462,066 · Granted Oct 2, 2018

Method of manufacturing semiconductor device

Inventors: Satoshi Shimamoto (Toyama, JP); Toshiyuki Kikuchi (Toyama, JP); Atsushi Moriya (Toyama, JP); Masanori Nakayama (Toyama, JP); Takashi Nakagawa (Toyama, JP)
Assignee: HITACHI KOKUSAI ELECTRIC INC.
H01L27/11582H01L21/0262H01L21/02532H01L21/28282H01L22/12H01L27/1157
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Quick Facts
Patent No.
US 10,090,322
App. No.
15/462,066
Granted
Oct 2, 2018
Kind
B2
Abstract

A method of manufacturing a semiconductor device, includes: loading a substrate including a laminated film including an insulating film and a sacrificial film, a channel hole formed in the laminated film, a charge trapping film formed on a surface in the channel hole, a first channel film formed on a surface of the charge trapping film, and a common source line exposed on the bottom of the channel hole; receiving information on a distribution of hole diameter of the channel hole; and forming a second channel film on a surface of the first channel film by supplying a first processing gas and a second processing gas to a center side and an outer peripheral side of the substrate, respectively, so as to correct the distribution of the hole diameter based on the information.

Claims (16)

1. A method of manufacturing a semiconductor device, comprising:

forming a plurality of first channel holes in a laminated film including an insulating film and a sacrificial film on a substrate;

forming a charge trapping film in each of the plurality of first channel holes and a first channel film on a surface of the charge trapping film in each of the plurality of first channel holes, thereby forming a plurality of second channel holes;

receiving information on a distribution of hole diameters of the plurality of second channel holes; and

forming a second channel film on a surface of the first channel film by supplying a first processing gas and a second processing gas different from the first processing gas to a center side and an outer peripheral side of the substrate, respectively, based on the received information, so as to create a substantively uniform distribution of the total thickness of the first channel film and the second channel film across the substrate of the semiconductor device.

2. The method of claim 1 , wherein the act of forming the second channel film on the surface of the first channel film is performed such that an in-plane distribution of the sum of a side wall thickness of the second channel film and a side wall thickness of the first channel film falls within a predetermined range.

3. The method of claim 2 , wherein before the charge trapping film and the first channel film are formed, the method further comprises:

acquiring data of an in-plane distribution of hole diameters of the plurality of first channel holes; and

forming a protective film on a surface of each of the plurality of first, channel holes based on the acquired data, so as to correct the in-plane distribution of the hole diameters of the plurality of first channel holes.

4. The method of claim 3 , wherein the act of forming the second channel film on the surface of the first channel film includes using a first silicon-containing gas and a second silicon-containing gas and setting amounts of the first silicon-containing gas and the second silicon-containing gas supplied to the center side of the substrate to be different from amounts of the first silicon-containing gas and the second silicon-containing gas supplied to the outer peripheral side of the substrate.

5. The method of claim 2 , wherein the act of forming the second channel film on the surface of the first channel film includes using a first silicon-containing gas and a second silicon-containing gas and setting amounts of the first silicon-containing gas and the second silicon-containing gas supplied to the center side of the substrate to be different from amounts of the first silicon-containing gas and the second silicon-containing gas supplied to the outer peripheral side of the substrate.

6. The method of claim 1 , wherein before the charge trapping film and the first channel film are formed, the method further comprises:

acquiring data of an in-plane distribution of hole diameters of the plurality of first channel holes; and

forming a protective film on a surface of each of the plurality of first channel holes based on the acquired data, so as to correct the in-plane distribution of the hole diameters of the plurality of first channel holes.

7. The method of claim 6 , wherein the act of forming the second channel film on the surface of the first channel film includes using a first silicon-containing gas and a second silicon-containing gas and setting amounts of the first silicon-containing gas and the second silicon-containing gas supplied to the center side of the substrate to be different from amounts of the first silicon-containing gas and the second silicon-containing gas supplied to the outer peripheral side of the substrate.

8. The method of claim 1 , wherein the act of forming the second channel film on the surface of the first channel film includes using a first silicon-containing gas and a second silicon-containing gas and setting amounts of the first silicon-containing gas and the second silicon-containing gas supplied to the center side of the substrate to be different from amounts of the first silicon-containing gas and the second silicon-containing gas supplied to the outer peripheral side of the substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2018
From: HITACHI KOKUSAI ELECTRIC INC.
To: KOKUSAI ELECTRIC CORPORATION
Reel/Frame 047995/0490 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2017
From: SHIMAMOTO, SATOSHI; KIKUCHI, TOSHIYUKI; MORIYA, ATSUSHI; NAKAYAMA, MASANORI; NAKAGAWA, TAKASHI
To: HITACHI KOKUSAI ELECTRIC INC.
Reel/Frame 041621/0056 →
Priority Claims (1)
JP 2017-002537 · Jan 11, 2017 · national
Continuity (1)
Related Publication 20180197877A1 · Jul 12, 2018