IP Library › Granted Patent US 10,516,710
Granted Patent B2
US 10,516,710 · App. 15/473,668 · Granted Dec 24, 2019

Direct packet placement

Inventors: Dotan Levi (Kiryat Motzkin, IL); Idan Burstein (Carmiel, IL); Shlomi Museri (Haifa, IL); Richard Hastie (Nantwich, GB)
Assignee: MELLANOX TECHNOLOGIES, LTD.
H04L65/4069H04L49/90H04L49/9057H04L65/608H04L45/24H04L47/34
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Quick Facts
Patent No.
US 10,516,710
App. No.
15/473,668
Granted
Dec 24, 2019
Kind
B2
Abstract

Communication apparatus includes a host interface and a network interface, which receives at least first and second redundant packet streams, each including a sequence of data packets, which include headers containing respective packet sequence numbers and data payloads of a predefined, fixed size containing respective slices of the data segment. Redundant first and second copies of each slice are transmitted in respective packets in the first and second packet streams. Packet processing circuitry receives the data packets from the network interface, maps the data packets in both the first and second packet streams, using the packet sequence numbers, to respective addresses in a buffer, and writes the data payloads to the respective addresses via the host interface while eliminating redundant data so that the buffer contains exactly one copy of each slice of the data segment, ordered in accordance with the packet sequence numbers.

Claims (23)

1. Communication apparatus, comprising:

a host interface, which is configured to be connected to a bus of a host computer having a processor and a memory, in which a buffer is allocated for receiving a data segment;

a network interface, which is configured to receive from a packet communication network at least first and second redundant packet streams, each packet stream comprising a sequence of data packets, which comprise headers containing respective packet sequence numbers and data payloads of a predefined, fixed size containing respective slices of the data segment, such that redundant first and second copies of each slice are transmitted respectively in at least a first data packet in the first packet stream and a second data packet in the second packet stream; and

packet processing circuitry, which is configured to receive the data packets from the network interface, to map the data packets in both the first and second packet streams, using the packet sequence numbers, to respective addresses in the buffer using a linear mapping of the packet sequence numbers, which is defined so that the first and second copies of any given data slice are both mapped to a common address in the buffer, and to write the data payloads to the respective addresses via the host interface while eliminating redundant data so that the buffer contains exactly one copy of each slice of the data segment, ordered in accordance with the packet sequence numbers.

2. The apparatus according to claim 1 , wherein the mapping is defined such that each packet sequence number PSN is mapped to an address equal to A+(PSN−X)×B, wherein X is an initial sequence number, B is the fixed size of the data payloads, and A is a base address of the buffer.

3. The apparatus according to claim 1 , wherein the data payloads comprise video data, comprising multiple data segments corresponding to frames of the video data.

4. The apparatus according to claim 3 , wherein the headers contain an indication of a start and end of each frame, and wherein the packet processing circuitry is configured to identify the indication in the headers and to select the buffer to which the data payloads are to be written responsively to the identified indication.

5. The apparatus according to claim 1 , wherein the packet processing circuitry is configured to maintain a record of the packet sequence numbers for which the data payloads have been written to the buffer, and responsively to the record, to discard redundant copies of the data payloads so that each slice is transmitted over the bus via the host interface no more than once.

6. The apparatus according to claim 1 , wherein the packet processing circuitry is configured to transmit all of the copies of each slice over the bus so that the redundant data in the buffer are overwritten.

7. The apparatus according to claim 1 , wherein the packet processing circuitry is configured to receive a work item from the processor indicating, for each data segment, an address of the buffer and the size of the slices, and to submit a completion report to the processor when all slices of the data segment have been written to the buffer.

8. The apparatus according to claim 1 , wherein the first and second packet streams are transmitted in accordance with a Real-time Transport Protocol (RTP), and wherein the headers comprise an RTP header, which contains the packet sequence numbers.

9. A method for data communication, comprising:

allocating a buffer in a memory of a host computer for receiving a data segment;

receiving in a network interface controller (NIC) of the host computer from a packet communication network at least first and second redundant packet streams, each packet stream comprising a sequence of data packets, which comprise headers containing respective packet sequence numbers and data payloads of a predefined, fixed size containing respective slices of the data segment, such that redundant first and second copies of each slice are transmitted respectively in at least a first data packet in the first packet stream and a second data packet in the second packet stream;

mapping the data packets in both the first and second packet streams, using the packet sequence numbers, to respective addresses in the buffer, using a linear mapping of the packet sequence numbers, which is defined so that the first and second copies of any given data slice are both mapped to a common address in the buffer; and

writing the data payloads to the respective addresses in the buffer while eliminating redundant data so that the buffer contains exactly one copy of each slice of the data segment, ordered in accordance with the packet sequence numbers.

10. The method according to claim 9 , wherein the mapping is defined such that each packet sequence number PSN is mapped to an address equal to A+(PSN−X)×B, wherein X is an initial sequence number, B is the fixed size of the data payloads, and A is a base address of the buffer.

11. The method according to claim 9 , wherein the data payloads comprise video data, comprising multiple data segments corresponding to frames of the video data.

12. The method according to claim 11 , wherein the headers contain an indication of a start and end of each frame, and wherein mapping the data packets comprises identifying the indication in the headers and selecting the buffer to which the data payloads are to be written responsively to the identified indication.

13. The method according to claim 9 , wherein writing the data payloads comprises maintaining a record of the packet sequence numbers for which the data payloads have been written to the buffer, and responsively to the record, discarding redundant copies of the data payloads so that each slice is transmitted over a bus of the host computer no more than once.

14. The method according to claim 9 , wherein writing the data payloads comprises transmitting all of the copies of each slice over a bus of the host computer so that the redundant data in the buffer are overwritten.

15. The method according to claim 9 , wherein mapping the data packets comprises receiving a work item from a processor of the host computer indicating, for each data segment, an address of the buffer and the size of the slices, and submitting a completion report to the processor when all slices of the data segment have been written to the buffer.

16. The method according to claim 9 , wherein the first and second packet streams are transmitted in accordance with a Real-time Transport Protocol (RTP), and wherein the headers comprise an RTP header, which contains the packet sequence numbers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2017
From: LEVI, DOTAN; BURSTEIN, IDAN; MUSERI, SHLOMI; HASTIE, RICHARD
To: MELLANOX TECHNOLOGIES, LTD.
Reel/Frame 041791/0663 →
Continuity (2)
Provisional Application 62457919 · Feb 12, 2017
Related Publication 20180234473A1 · Aug 16, 2018
Cited By (5)
US 12,216,575 US 12,339,902 US 12,341,986 US 12,393,743 US 12,401,932