Semiconductor device suppressing electric field concentration and method for manufacturing
A semiconductor device includes a semiconductor layer, having an active region, in which a functional element is formed, a first impurity region of a first conductivity type, formed at a surface layer portion of the semiconductor layer, a second impurity region of a second conductivity type, formed at a surface layer portion of the first impurity region and defining the active region, and a well region of the second conductivity type, formed along a periphery of the second impurity region at the surface layer portion of the first impurity region and having an inner side edge portion positioned at the second impurity region side, and an outer side edge portion positioned at an opposite side with respect to the second impurity region and having a second conductivity type impurity concentration lower than a second conductivity type impurity concentration of the inner side edge portion.
1. A semiconductor device comprising:
a semiconductor layer, having an active region, in which a functional element is formed;
a first impurity region of a first conductivity type, formed at a surface layer portion of the semiconductor layer;
a second impurity region of a second conductivity type, formed at a surface layer portion of the first impurity region in the active region; and
a well region of the second conductivity type, formed along a periphery of the second impurity region at the surface layer portion of the first impurity region so as to define the active region, and having an inner side edge portion connected to the second impurity region, an outer side edge portion positioned at an opposite side with respect to the second impurity region and having a second conductivity type impurity concentration lower than a second conductivity type impurity concentration of the inner side edge portion, and an inner portion extending in a region between the inner side edge portion and the outer side edge portion with a uniform thickness,
wherein the well region has a concentration profile in which a second conductivity type impurity concentration gradually decreases from the inner portion to the outer side edge portion, and
a width of the outer side edge portion in a direction away from the second impurity region is greater than a thickness of the outer side edge portion in a thickness direction of the semiconductor layer.
2. The semiconductor device according to claim 1 , wherein the well region has a concentration profile where the second conductivity type impurity concentration decreases gradually from the inner side edge portion toward the outer side edge portion.
3. The semiconductor device according to claim 1 , wherein the well region has a concentration profile where the second conductivity type impurity concentration decreases gradually in the thickness direction.
4. The semiconductor device according to claim 1 , further comprising:
an oxide film covering the outer side edge portion of the well region on the semiconductor; and
a front surface insulating film having a thickness lower than a thickness of the oxide film, and covering the inner side edge portion and the inner portion of the well region on the semiconductor layer such as to be formed integrally with the oxide film on the well region;
wherein, the second conductivity type impurity concentration of the outer side edge portion covered by the oxide film is lower than the second conductivity type impurity concentration of the inner side edge portion covered by the front surface insulating film.
5. The semiconductor device according to claim 4 , wherein a portion covering the outer side edge portion of the well region in the oxide film contains a second conductivity type impurity of the same type as the second conductivity type impurity contained in the well region.
6. The semiconductor device according to claim 1 , wherein a step portion, which is depressed in the thickness direction, is formed in a region that includes the outer side edge portion of the well region in the surface of the semiconductor layer, and, a second conductivity type impurity concentration of a surface side of the outer side edge portion that is exposed from the step portion is lower than a second conductivity type impurity concentration of a surface side of the inner side edge portion that is exposed from the surface of the semiconductor layer in the well region.
7. The semiconductor device according to claim 1 , wherein the inner side edge portion of the well region is connected to the second impurity region.
8. The semiconductor device according to claim 1 , wherein the well region surrounds the second impurity region.
9. The semiconductor device according to claim 1 , wherein the first conductivity type is an n type, the second conductivity type is a p type, and the well region includes boron as a p type impurity.
10. The semiconductor device according to claim 1 , further comprising:
an oxide film including a covering portion covering the outer side edge portion of the well region on the semiconductor layer, a width of the covering portion in the direction away from the second impurity region being greater than the thickness of the outer side edge portion of the well region.