Random number generator that includes physically unclonable circuits

1. An apparatus, comprising:

a plurality of physically unclonable circuits;

first circuitry to detect which ones of the physically unclonable circuits are unstable and which ones of the physically unclonable circuit are stable, the first circuitry comprising a respective signature change detection circuit for each of the physically unclonable circuits;

second circuitry to steer unstable ones of the physically unclonable circuits to a random number generator circuit and steer stable ones of the physically unclonable circuit to a security circuit; and,

wherein, the random number generator circuit comprises a circuit that invalidates same data values from two consecutively sampled unstable physically unclonable circuits, and wherein, the random number generator circuit further comprises a multiplexer having separate input channels coupled to different ones of the physically unclonable circuits, the multiplexer comprising a channel select input, the channel select input to be driven by information from a dark bit mask that identifies which ones of the physically unclonable are unstable.

2. The apparatus of claim 1 wherein the random number generator circuit comprises a series of random number generator cores.

3. The apparatus of claim 2 wherein the series of random number generator cores are to progressively operate on smaller bit widths of random information.

4. The apparatus of claim 2 wherein the random number generator comprises registers between the random number generator cores, the registers to hold random information between the random number generator cores.

5. A computing system, comprising:

a plurality of processing cores;

a system memory;

a memory controller coupled between the system memory and the plurality of processing cores;

a plurality of physically unclonable circuits;

first circuitry to detect which ones of the physically unclonable circuits are unstable and which ones of the physically unclonable circuit are stable, the first circuitry comprising a respective signature change detection circuit for each of the physically unclonable circuits;

second circuitry to steer unstable ones of the physically unclonable circuits to a random number generator circuit and steer stable ones of the physically unclonable circuit to a security circuit; and,

wherein, the random number generator circuit comprises a circuit that invalidates same data values from two consecutively sampled unstable physically unclonable circuits, and wherein, the random number generator circuit further comprises a multiplexer having separate input channels coupled to different ones of the physically unclonable circuits, the multiplexer comprising a channel select input, the channel select input to be driven by information from a dark bit mask that identifies which ones of the physically unclonable are unstable.

6. The computing system of claim 5 wherein the random number generator circuit comprises a series of random number generator cores.

7. The computing system of claim 6 wherein the series of random number generator cores are to progressively operate on smaller bit widths.

8. The computing system of claim 6 wherein the random number generator comprises registers between the random number generator cores, the registers to hold random information between the random number generator cores.

9. An apparatus, comprising:

a plurality of physically unclonable circuits;

first circuitry to detect which ones of the physically unclonable circuits are unstable and which ones of the physically unclonable circuit are stable, the first circuitry comprising a respective signature change detection circuit for each of the physically unclonable circuits;

second circuitry to steer unstable ones of the physically unclonable circuits to a random number generator circuit and steer stable ones of the physically unclonable circuit to a security circuit;

circuitry to couple the stable ones of the physically unclonable circuits to a chip signature circuit; and,

wherein, the random number generator circuit comprises a circuit that invalidates same data values from two consecutively sampled unstable physically unclonable circuits, and wherein, the random number generator circuit further comprises a multiplexer having separate input channels coupled to different ones of the physically unclonable circuits, the multiplexer comprising a channel select input, the channel select input to be driven by information from a dark bit mask that identifies which ones of the physically unclonable are unstable.

10. The apparatus of claim 9 wherein the random number generator circuit comprises a series of random number generator cores.

11. The apparatus of claim 10 wherein the series of random number generator cores are to progressively operate on smaller bit widths.