Method, apparatus, and computer-readable medium for parallelization of a computer program on a plurality of computing cores
An apparatus, computer-readable medium, and computer-implemented method for parallelization of a computer program on a plurality of computing cores includes receiving a computer program comprising a plurality of commands, decomposing the plurality of commands into a plurality of node networks, each node network corresponding to a command in the plurality of commands and including one or more nodes corresponding to execution dependencies of the command, mapping the plurality of node networks to a plurality of systolic arrays, each systolic array comprising a plurality of cells and each non-data node in each node network being mapped to a cell in the plurality of cells, and mapping each cell in each systolic array to a computing core in the plurality of computing cores.
1. A computer architecture comprising:
a plurality of computing cores programmed to execute a plurality of commands, the commands being decomposed into a plurality of node networks whereby each node network corresponds to a command in the plurality of commands and includes one or more nodes corresponding to execution dependencies of the command, the plurality of node networks are mapped to a plurality of systolic arrays, wherein each systolic array comprises a plurality of cells and wherein nodes in each node network are mapped to a cell in the plurality of cells, each cell in each systolic array is mapped to a computing core in the plurality of computing cores;
an input interface coupled to the plurality of computing cores, the input interface being configured to receive input data in fixed packets; and
an output interface coupled to the plurality of computing cores and configured to transmit output data from the plurality of computing cores to an order book.
2. The computer architecture as recited in claim 1 , wherein the input data is from computer trading platform.
3. The computer architecture as recited in claim 1 , wherein the order book is stored as a database.
4. The computer architecture as recited in claim 2 , wherein the input data is in form of IP packets.
5. The computer architecture of claim 1 , wherein the nodes in the node network include data nodes, command nodes, and sub-command nodes.
6. The computer architecture of claim 1 , wherein at least some of the computing cores for a systolic array are on separate devices which are coupled to one another over a network.
7. The computer architecture of claim 6 , wherein the network is a cloud network.
8. The computer architecture of claim 6 , wherein the separate devices are all part of a server farm.
9. The computer architecture of claim 1 , wherein at least one cell in the plurality of cells corresponds to a command or sub-command and the at least one cell corresponding to the command or sub-command is connected to one or more other cells in the plurality of cells based at least in part on a determination that output of the one or more other cells is input to the command or sub-command.
10. The computer architecture of claim 9 , wherein the determination that the output of one or more other nodes corresponding to the one or more other cells is input to the command or subcommand is made based on a language definition file corresponding to a programming language.