Automatic control of synchronous rectifier turn-off threshold

1. A circuit comprising:

a dead time evaluation circuit to determine an up indication indicating whether a measured dead time is less than a target dead time;

an offset voltage controller circuit to:

determine, using the up indication, an offset count,

determine, using the offset count, an offset voltage, and

determine a high saturation indication indicating that the offset count has a maximum value, and

determine a low saturation indication indicating that the offset count has a minimum value;

an off threshold control circuit to:

determine, using the high saturation indication and the low saturation indication, a threshold count, and

determine, using the threshold count, an off threshold voltage; and

a comparator circuit to determine whether a measured voltage is greater than a virtual off threshold voltage,

wherein the virtual off threshold voltage is equal to the off threshold voltage minus the offset voltage.

2. The circuit claim 1 , wherein the comparator circuit comprises:

a summing circuit to add the offset voltage to the measured voltage; and

a comparator to compare the sum of the offset voltage and the measured voltage to the off threshold voltage.

3. The circuit of claim 2 ,

wherein the summing circuit comprises an offset resistor having a first terminal coupled to the measured voltage and a second terminal coupled to the comparator; and

wherein the offset voltage controller circuit generates a modulation current corresponding to the offset voltage and provides the modulation current to the second terminal of the offset resistor.

4. The circuit of claim 3 , wherein the offset voltage controller circuit comprises:

a Digital-to-Analog Convert (DAC) to convert the offset count to an analog signal;

a constant current source to provide a first current; and

a programmable current source to convert the analog signal to a corresponding second current,

wherein the offset voltage controller circuit generates the modulation current by subtracting the second current from the first current.

5. The circuit of claim 4 , wherein the constant current source provide the first current from an internal voltage less than a turn off detection threshold.

6. The circuit of claim 1 , further comprising:

a gate control circuit to control a gate of a synchronous rectifier (SR) switching device by turning off the SR switching device in response to the measured voltage being greater than the virtual off threshold voltage;

wherein the measured voltage is a drain voltage of the SR switching device.

7. The circuit of claim 5 , further comprising:

an SR conduction determining circuit to assert an SR conduction signal when the SR switching device is conducting current and de-assert the SR conduction signal otherwise; and

an offset count reset circuit to assert an offset count reset indication in response to the high saturation indication being asserted for two consecutive assertion of the SR conduction signal;

wherein the offset voltage controller circuit resets the offset count to a minimum value in response to the offset count reset indication being asserted.

8. The circuit of claim 6 , wherein the off threshold control circuit is to:

decrease the threshold count in response to the low saturation indication indicating that the offset count has the minimum value for two consecutive assertion of the SR conduction signal; and

increase the threshold count in response to the high saturation indication indicating that the offset count has the maximum value for two consecutive assertion of the SR conduction signal.

9. The circuit of claim 1 , wherein the circuit is a Synchronous Rectifier controller circuit.