IP Library › Granted Patent US 10,417,156
Granted Patent B2
US 10,417,156 · App. 15/488,520 · Granted Sep 17, 2019

Hardware resource sharing within peripheral component interconnect express (PCIE) environment capable of assigning hardware resource dynamically

Inventors: Chao-Hsien Hsu (Taipei, TW); Tsung-Hsi Lee (Taipei, TW); Kuo-Wei Huang (Taipei, TW)
Assignees: Inventec (Pudong) Technology Corp.; Inventec Corporation
G06F13/4022G06F13/4282
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Quick Facts
Patent No.
US 10,417,156
App. No.
15/488,520
Granted
Sep 17, 2019
Kind
B2
Abstract

A switching fabric includes a plurality of buses and a plurality of switching devices. A method for operating the switching fabric includes assigning the plurality of buses to be a plurality of peripheral buses and a plurality of computer buses according to a predetermined configuration, establishing electrical connections between the plurality of computer buses and the plurality of peripheral buses according to the predetermined configuration, and when a first computer is coupled to a first computer bus of the plurality of computer buses and performs a peripheral component interconnect express scan function, transmitting types and/or utilization information of a plurality of first peripheral devices corresponding to the first computer bus to the first computer according to the predetermined configuration to make the first computer reserve memory segments required by the plurality of first peripheral devices.

Claims (31)

1. A hardware resource sharing system comprising:

a switching fabric comprising a plurality of buses and a plurality of switching devices, the plurality of buses being compatible with a peripheral component interconnect express (PCIE) transmission format; and

a resource sharing controller coupled to the switching fabric and configured to control the switching fabric to assign the plurality of buses to be a plurality of peripheral buses and a plurality of computer buses according to a predetermined configuration, and establish electrical connections between the plurality of computer buses and the plurality of peripheral buses according to the predetermined configuration;

wherein:

the predetermined configuration comprises number, types and/or utilization information of peripheral devices supportable by the hardware resource sharing system, number of computers supportable by the hardware resource sharing system, and connection configuration between the plurality of buses and the plurality of switching devices;

the plurality of computer buses are configured to be coupled to external computers;

the plurality of peripheral buses are configured to be coupled to peripheral devices; and

when a first computer is coupled to a first computer bus of the plurality of computer buses and performs a peripheral component interconnect express scan function, the resource sharing controller transmits types and/or utilization information of a plurality of first peripheral devices corresponding to the first computer bus to the first computer according to the predetermined configuration to make the first computer reserve memory segments required by the plurality of first peripheral devices;

when the first computer sends a request to the resource sharing controller to control a specific peripheral device of the plurality of first peripheral devices while the specific peripheral device has not coupled to any of the plurality of peripheral buses, the resource sharing controller issues a busy message to the first computer.

2. The hardware resource sharing system of claim 1 , wherein when the first computer sends a request to the resource sharing controller to control the specific peripheral device of the plurality of peripheral devices while the specific peripheral device is coupled to a corresponding peripheral bus of the plurality of first peripheral buses, the resource sharing controller controls the switching fabric to establish an electrical connection between the first computer bus and the corresponding peripheral bus.

3. The hardware resource sharing system of claim 1 , wherein:

when a second computer is coupled to a second computer bus of the plurality of computer buses and performs the peripheral component interconnect express scan function, the resource sharing controller transmits types and/or utilization information of a plurality of second peripheral devices corresponding to the second computer bus to the second computer according to the predetermined configuration to make the second computer reserve memory segments required by the plurality of second peripheral devices; and

at least one peripheral device corresponds to both of the first computer bus and the second computer bus.

4. The hardware resource sharing system of claim 3 , wherein:

when the first computer occupies a specific peripheral device corresponding to both of the first computer bus and the second computer bus, and the second computer sends a request to the resource sharing controller to control the specific peripheral device, the resource sharing controller issues a busy message to the second computer.

5. The hardware resource sharing system of claim 1 , wherein the resource sharing controller is further configured to reassign the plurality of buses to be a plurality of computer buses and a plurality of peripheral buses according to an updated configuration.

6. A method for operating a switching fabric, the switching fabric comprising a plurality of buses and a plurality of switching devices, the method comprising:

assigning the plurality of buses to be a plurality of peripheral buses and a plurality of computer buses according to a predetermined configuration;

establishing electrical connections between the plurality of computer buses and the plurality of peripheral buses according to the predetermined configuration;

when a first computer is coupled to a first computer bus of the plurality of computer buses and performs a peripheral component interconnect express scan function, transmitting types and/or utilization information of a plurality of first peripheral devices corresponding to the first computer bus to the first computer according to the predetermined configuration to make the first computer reserve memory segments required by the plurality of first peripheral devices; and

when the first computer sends a request to control a specific peripheral device of the plurality of first peripheral devices while the specific peripheral device has not coupled to any of the plurality of peripheral buses, issuing a busy message to the first computer.

7. The method for operating the switching fabric of claim 6 , further comprising:

when the first computer sends a request to control the specific peripheral device of the plurality of peripheral devices while the specific peripheral device is coupled to a corresponding peripheral bus of the plurality of first peripheral buses, establishing an electrical connection between the first computer bus and the corresponding peripheral bus.

8. The method for operating the switching fabric, of claim 6 , further comprising:

when a second computer is coupled to a second computer bus of the plurality of computer buses and performs the peripheral component interconnect express scan function, transmitting types and/or utilization information of a plurality of second peripheral devices corresponding to the second computer bus to the second computer according to the predetermined configuration to make the second computer reserve memory segments required by the plurality of second peripheral devices;

wherein at least one peripheral device corresponds to both of the first computer bus and the second computer bus.

9. The method for operating the switching fabric, of claim 8 , further comprising:

when the first computer occupies a specific peripheral device corresponding to both of the first computer bus and the second computer bus, and the second computer sends a request to control the specific peripheral device, issuing a busy message to the second computer.

10. The method for operating the switching fabric, of claim 6 , further comprising:

updating the predetermined configuration to generate an updated configuration; and

reassigning the plurality of buses to be a plurality of computer buses and a plurality of peripheral buses according to the updated configuration.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2017
From: HSU, CHAO-HSIEN; LEE, TSUNG-HSI; HUANG, KUO-WEI
To: INVENTEC (PUDONG) TECHNOLOGY CORP.; INVENTEC CORPORATION
Reel/Frame 042022/0898 →
Priority Claims (1)
CN 2016 1 1047862 · Nov 21, 2016 · national
Continuity (1)
Related Publication 20180143929A1 · May 24, 2018
Cited By (2)
US 12,293,094 US 12,547,543