IP Library › Granted Patent US 10,236,351
Granted Patent B2
US 10,236,351 · App. 15/490,267 · Granted Mar 19, 2019

Power semiconductor device trench having field plate and gate electrode

Inventors: Thomas Feil (Villach, AT); Michael Hutzler (Villach, AT)
Assignee: Infineon Technologies Austria AG
H01L29/407H01L29/401H01L29/42356H01L29/42376H01L29/66666H01L29/7813H01L29/7827
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,236,351
App. No.
15/490,267
Granted
Mar 19, 2019
Kind
B2
Abstract

A method of processing a power semiconductor device includes: providing a semiconductor body with a trench extending into the semiconductor body along an extension direction and including an insulator; providing a monolithic electrode zone within the trench; and removing a section of the monolithic electrode zone within the trench to divide the monolithic electrode zone into at least a first electrode structure and a second electrode structure arranged separately and electrically insulated from each other.

Claims (28)

1. A method of processing a power semiconductor device, the method comprising:

providing a semiconductor body that includes a trench, the trench extending into the semiconductor body along an extension direction and comprising an insulator;

providing a monolithic electrode zone within the trench, the monolithic electrode zone forming a well structure within an upper part of the trench; and

removing a section of the monolithic electrode zone within the trench to divide the monolithic electrode zone into at least a first electrode structure and a second electrode structure arranged separately and electrically insulated from each other, the second electrode structure extending below the well structure.

2. The method of claim 1 , wherein the monolithic electrode zone comprises a metal.

3. The method of claim 1 , wherein the insulator forms trench sidewalls and a trench bottom, and wherein the monolithic electrode zone covers the entire trench sidewalls and the trench bottom.

4. The method of claim 1 , wherein the first electrode structure is arranged in the upper part of the trench and wherein the second electrode structure is arranged in a lower part of the trench.

5. The method of claim 1 , wherein removing the section of the monolithic electrode zone comprises removing at least a part of a bottom of the well structure.

6. The method of claim 1 , wherein the insulator forms trench sidewalls and a trench bottom, and wherein the method further comprises, prior to providing the monolithic electrode zone:

structuring the insulator within the trench such that at least one of the trench sidewalls has a step profile along the extension direction having at least one step.

7. The method of claim 6 , wherein the at least one step supports the well structure bottom to be at least partially removed.

8. The method of claim 6 , wherein the structuring comprises:

partially filling the trench with a sacrificial material;

removing a section of the insulator arranged within the trench and above the sacrificial material;

eliminating the sacrificial material within the trench; and

creating an oxide in a region within the trench where said insulator section has been removed.

9. The method of claim 8 , wherein creating the oxide includes at least one of a deposition process and a thermal oxidation process.

10. A method of processing a power semiconductor device, the method comprising:

providing a semiconductor body that includes a trench, the trench extending into the semiconductor body along an extension direction and comprising an insulator, the insulator forming trench sidewalls and a trench bottom;

providing a monolithic electrode zone within the trench;

removing a section of the monolithic electrode zone within the trench to divide the monolithic electrode zone into at least a first electrode structure and a second electrode structure arranged separately and electrically insulated from each other; and

prior to providing the monolithic electrode zone, structuring the insulator within the trench such that at least one of the trench sidewalls has a step profile along the extension direction having at least one step,

wherein the structuring comprises: partially filling the trench with a sacrificial material; removing a section of the insulator arranged within the trench and above the sacrificial material; eliminating the sacrificial material within the trench; and creating an oxide in a region within the trench where said insulator section has been removed.

11. The method of claim 10 , wherein creating the oxide includes at least one of a deposition process and a thermal oxidation process.

12. A method of processing a power semiconductor device, the method comprising:

providing a semiconductor body that includes a trench, the trench extending into the semiconductor body along an extension direction and comprising an insulator;

providing a monolithic electrode zone within the trench; and

removing a section of the monolithic electrode zone within the trench to divide the monolithic electrode zone into a control electrode structure disposed along sidewalls of the trench in an upper part of the trench and a field electrode structure spaced inward from and below the control electrode structure in a lower part of the trench, the control electrode structure and the field electrode structure being electrically insulated from each other and electrically connected to different potentials.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2017
From: FEIL, THOMAS; HUTZLER, MICHAEL
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 042824/0881 →
Priority Claims (1)
DE 10 2016 107 203 · Apr 19, 2016 · national
Continuity (1)
Related Publication 20170301763A1 · Oct 19, 2017