IP Library Granted Patent US 10,171,073
Granted Patent B2
US 10,171,073 · App. 15/491,287 · Granted Jan 1, 2019

Regulating transition slope using differential output

Inventor: Pavel Horsky (Brno, CZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H03K17/162G11C27/026H02P8/12H03K5/19
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Quick Facts
Patent No.
US 10,171,073
App. No.
15/491,287
Granted
Jan 1, 2019
Kind
B2
Abstract

A circuit includes a first driver, a second driver, and one or more monitor modules coupled to the first or second driver to measure slope times of the first or second driver. The circuit further includes a comparator coupled to the one or more monitor modules to compare the slope times of the first and second drivers. The circuit further includes one or more regulators coupled to the comparator and the first or second driver to regulate a slope of the first or second driver, based on output of the comparator, at most once per pulse cycle until the slope of the first or second driver reaches a target slope.

Claims (29)

1. A circuit for producing a differential output signal pair, the circuit comprising:

a first driver for a first output signal in the differential output signal pair;

a second driver for a second output signal in the differential output signal pair;

one or more monitor modules coupled to the first and second drivers to measure slope times of the first and second drivers during each transition;

a comparator coupled to the one or more monitor modules to compare the slope times of the first and second drivers;

one or more regulators coupled to the comparator and at least one of the first and second drivers to regulate at least one slope time of the first or second driver, based on output of the comparator, to provide the first and second output signals in the differential output signal pair with a constant average.

2. The circuit of claim 1 , wherein the one or more regulators regulate the at least one slope time by initiating an increase or decrease in voltage or current supplied to the at least one of the first and second drivers at most once per pulse cycle until the constant average is achieved.

3. The circuit of claim 1 , wherein the one or more regulators regulate the at least one slope time by adjusting a start time of a voltage or current transition supplied to the at least one of the first and second drivers at most once per pulse cycle until the first and second drivers have matching start times.

4. The circuit of claim 1 , wherein the slope times are measured at least in part by determining a start time at which a transition of the first driver begins and determining a start time at which a transition of the second driver begins, and wherein the slope times of the first and second drivers are compared at least in part by comparing the start times for the first and second drivers.

5. The circuit of claim 1 , wherein the slope times are measured at least in part by determining an end time at which a transition of the first driver ends and determining an end time at which a transition of the second driver ends, and wherein the slope times of the first and second drivers are compared at least in part by comparing the end times for the first and second drivers.

6. The circuit of claim 1 , wherein the slope times of the first and second drivers are compared at least in part by comparing durations of transitions of the first and second drivers.

7. The circuit of claim 1 , wherein the at least one slope time of the first and second drivers is regulated by causing transitions of the first and second drivers to have complementary slopes.

8. The circuit of claim 1 , wherein slope times of both the first and second drivers are regulated based on output of the comparator.

9. The circuit of claim 1 , wherein the first driver comprises a first pair of transistors having a common node at which said at least one slope time is measured, and wherein the second driver comprises a second pair of transistors having a different common node at which a second slope time is measured.

10. The circuit of claim 1 , wherein the differential output signal pair drives an inductive load via twisted pair cable.

11. The circuit of claim 1 , wherein the differential output signal pair drives a DC stepper motor.

12. The circuit of claim 1 , wherein the comparator also tracks a second circuit condition different from slope, the second circuit condition selected from the group consisting of: an under load, an open load, an over voltage load, an over current, and a short circuit.

13. A method for producing a differential output signal pair, the method comprising:

measuring slope times of first and second drivers;

comparing the slope times of the first and second drivers;

regulating at least one slope time of the first or second driver, based on the comparison, to provide the first and second output signals in the differential output signal pair with a constant average.

14. The method of claim 13 , wherein said regulating the at least one slope time comprises initiating an increase or decrease in voltage or current supplied to at least one of the first or second drivers at most once per pulse cycle until the constant average is achieved.

15. The method of claim 13 , wherein said regulating the at least one slope time comprises adjusting a start time of a voltage or current transition supplied to the at least one of the first or second driver at most once per pulse cycle until the first and second drivers have matching start times.

16. The method of claim 13 , wherein the at least one slope time is regulated by causing transitions of the first and second drivers to have complementary slopes.

17. The method of claim 13 , wherein said measuring the slope times comprises determining start times and end times for transitions of the first and second drivers, and wherein said comparing the slope times comprises:

comparing the start times for the first and second drivers; and

comparing the end times for the first and second drivers.

18. The method of claim 13 , further comprising driving an inductive load via twisted pair cable with the differential output signal pair.

19. The method of claim 13 , further comprising driving a DC stepper motor with the differential output signal pair.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 044481, FRAME 0594 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064074/0363 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0594 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2017
From: HORSKY, PAVEL
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042062/0859 →
Continuity (1)
Related Publication 20180309439A1 · Oct 25, 2018