IP Library Granted Patent US 10,950,605
Granted Patent B2
US 10,950,605 · App. 15/492,059 · Granted Mar 16, 2021

Semiconductor device

Inventor: Jhon-Jhy Liaw (Hsinchu County, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L27/0924H01L29/41791H01L29/785
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Quick Facts
Patent No.
US 10,950,605
App. No.
15/492,059
Granted
Mar 16, 2021
Kind
B2
Abstract

A semiconductor device includes a first transistor. The first transistor includes a first terminal, a first contact, a second terminal, and a second contact. The first contact is electrically connected to the first terminal, and the shape of the first contact is circular. The second contact is electrically connected to the second terminal and a ground terminal, and the shape of the second contact is rectangular.

Claims (41)

1. A semiconductor device, comprising:

a first fin extending in a first direction and having a first source and a first drain;

a gate extending a second direction perpendicular to the first direction, wherein the first source and the first drain are respectively on opposite sides of the gate when viewed from above;

a first source contact in contact with the first source and laterally extending beyond a longitudinal end of the gate when viewed in a first cross-section taken along the second direction; and

a first drain contact in contact with the first drain when viewed in a second cross-section taken along the second direction, wherein when viewed from above, the first source contact forms a first rectangular pattern and the first drain contact forms a first circular pattern.

2. The semiconductor device of claim 1 , wherein the first source contact is in direct contact with the first source, and the first drain contact is in direct contact with the first drain.

3. The semiconductor device of claim 1 , wherein the first circular pattern of the first drain contact has a major axis and a minor axis, and a ratio of the major axis and the minor axis of the first circular pattern is about 0.8 to 1.2, and the first rectangular pattern of the first source contact has a length and a width, and a ratio of the length and the width of the first rectangular pattern is larger than 3.

4. The semiconductor device of claim 1 , further comprising:

a second fin extending in the first direction and having a second source and a second drain, wherein the second source and the second drain are respectively on the opposite sides of the gate when viewed from above;

a second source contact in contact with the second source when viewed in the first cross-section; and

a second drain contact in contact with the second drain viewed in the second cross-section, wherein when viewed from above the second source contact forms a second rectangular pattern and the first drain contact forms a second circular pattern.

5. The semiconductor device of claim 4 , wherein the second source contact is in direct contact with the second source, and the second drain contact is in direct contact with the second drain.

6. The semiconductor device of claim 4 , wherein the second circular pattern of the second drain contact has a major axis and a minor axis, and a ratio of the major axis and the minor axis of the second circular pattern is about 0.8 to 1.2, and the second rectangular pattern of the second source contact has a length and a width, and a ratio of the length and the width of the second rectangular pattern is larger than 3.

7. The semiconductor device of claim 1 , further comprising a source via landing on the first source contact and does not overlap the first fin when viewed from above.

8. The semiconductor device of claim 7 , further comprising a conductive line in contact with the source via, wherein when viewed from above the first source contact is across opposite edges of the conductive line.

9. The semiconductor device of claim 7 , further comprising a conductive line in contact with the source via, wherein when viewed from above a length of a top surface of the first source contact measured in a lengthwise direction of the gate is greater than a length of a top surface of the conductive line measured in the lengthwise direction of the gate.

10. A semiconductor device, comprising:

a first fin extending in a first direction and having a first source and a first drain;

a gate extending a second direction perpendicular to the first direction, wherein the first source and the first drain are respectively on opposite sides of the gate when viewed from above;

a first drain contact in contact with the first drain when viewed in a cross-section taken along the second direction;

a drain via in contact with the first drain contact when viewed in the cross-section taken along the second direction, wherein when viewed from above, the first drain contact and the drain via form first and second circular patterns overlapping at the first drain of the first fin;

a first metal line in contact with the drain via and extending in the first direction;

a first source contact directly connected to the first source and electrically connected to a ground terminal, wherein when viewed from above the first source contact forms a first rectangular pattern;

a source via in contact with the first source contact; and

a second metal line in contact with the source via and extending in the first direction, wherein the first source contact extending past a longitudinal side of the first metal line and a longitudinal side of the second metal line from a top view.

11. The semiconductor device of claim 10 , wherein the first fin, the gate, the first source, and the first drain are of an N-type single fin-line fin field effect transistor.

12. The semiconductor device of claim 10 , wherein the first circular pattern of the first drain contact has a major axis and a minor axis, and a ratio of the major axis and the minor axis of the first circular pattern is about 0.8 to 1.2, and the first rectangular pattern of the first source contact has a length and a width, and a ratio of the length and the width of the first rectangular pattern is larger than 3.

13. The semiconductor device of claim 10 , further comprising:

a second fin extending in the first direction and having a second source and a second drain, wherein the second source and the second drain are respectively on the opposite sides of the gate when viewed from above; and

a second source contact and a second drain contact in direct contact with the source and the drain when viewed in a cross-section taken along the second direction, wherein when viewed from above the second source contact forms a second rectangular pattern and the first drain contact forms a third circular pattern and the second source contact is connected to a power source.

14. The semiconductor device of claim 13 , wherein the second fin, the gate, the second source, and the second drain are of a P-type FinFET.

15. The semiconductor device of claim 13 , wherein the third circular pattern of the second drain contact has a major axis and a minor axis, and a ratio of the major axis and the minor axis of the third circular pattern is about 0.8 to 1.2, and the second rectangular pattern of the second source contact has a length and a width, and a ratio of the length and the width of the second rectangular pattern is larger than 3.

16. The semiconductor device of claim 10 , wherein when viewed from above, an area of a top surface of the first source contact is greater than an area of a top surface of the first drain contact.

17. The semiconductor device of claim 10 , wherein when viewed from above, a length of a top surface of the first source contact measured in a lengthwise direction of the gate is greater than a length of a top surface of the first drain contact measured in the lengthwise direction of the gate.

18. A semiconductor device, comprising:

a fin extending in a first direction and having a source and a drain;

a gate extending a second direction perpendicular to the first direction, wherein the source and the drain are respectively on opposite sides of the gate when viewed from above;

a source contact and a drain contact respectively overlapping the source and the drain of the fin, wherein when viewed from above the source contact has a rectangular top surface, and the drain contact has a circular top surface, and the rectangular top surface of the source contact is on the same level with the circular top surface of the drain contact when viewed in a cross section taken along the second direction; and

first and second high-k dielectric layers respectively laterally surrounding the source and drain contacts.

19. The semiconductor device of claim 18 , wherein a width of the drain contact is smaller than a width the source contact.

20. The semiconductor device of claim 18 , wherein the first high-k dielectric layer and the second high-k dielectric layer have different heights.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2024
From: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
To: PARABELLUM STRATEGIC OPPORTUNITIES FUND LLC
Reel/Frame 068326/0474 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2017
From: LIAW, JHON-JHY
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 042075/0737 →
Continuity (2)
Provisional Application 62475914 · Mar 24, 2017
Related Publication 20180277542A1 · Sep 27, 2018
Cited By (1)
US 12,464,816