IP Library Granted Patent US 10,181,356
Granted Patent B2
US 10,181,356 · App. 15/494,134 · Granted Jan 15, 2019

Flash memory counter

Inventors: Ronny Van Keer (Hoeilaart, BE); Youssef Ahssini (Vilvoorde, BE)
Assignee: PROTON WORLD INTERNATIONAL N.V.
G11C16/349G11C16/14G11C16/20G11C16/26
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Quick Facts
Patent No.
US 10,181,356
App. No.
15/494,134
Granted
Jan 15, 2019
Kind
B2
Abstract

A method of updating a counter in a flash memory includes a first phase where a set of values capable of being taken by the counter are programmed in at least one page of the flash memory. A second phase of updating the counter programs a state zero in the flash memory each time the counter is incremented/decremented.

Claims (14)

1. A memory-based counter device, comprising:

counter logic means for sequentially counting from an initial value to a final value, wherein the initial value, the final value, and each successive value between the initial value and the final value form a set of integers capable of being taken by a counter, and wherein each value in the set of integers is a different value; and

processing means for initializing the counter logic means and for retrieving a current counter value, the initializing by storing the set of integers between the initial value and the final value inclusive in the counter logic means.

2. A memory-based counter device according to claim 1 , wherein the set of integers includes all integers beginning at the initial value and ascending to the final value.

3. A memory-based counter device according to claim 1 , wherein the set of integers includes all integers beginning at the initial value and descending to the final value.

4. A memory-based counter device according to claim 1 , wherein the counter logic means includes a flash memory.

5. A memory-based counter device according to claim 4 , wherein the set of integers are stored on at least one dedicated page of the flash memory.

6. A memory-based counter device according to claim 4 , wherein the initializing includes erasing at least one dedicated page of the flash memory before storing the set of integers between the initial value and the final value inclusive in the counter logic means.

7. A memory-based counter device according to claim 1 , wherein retrieving the current counter value includes identifying a first sequential location in a memory that does not have a clearing value.

8. A memory-based counter device according to claim 7 , wherein the processing means is for updating the current counter value by writing the clearing value in the flash memory at a next sequential location after the first sequential location in the memory that does not have the clearing value.

9. A memory-based counter device according to claim 7 , wherein the clearing value is zero.

10. A memory-based counter device according to claim 7 , wherein the clearing value is not zero.

11. A memory-based counter device according to claim 1 , wherein the memory-based counter device is formed as part of a microcircuit card.

12. A memory-based counter device according to claim 1 , wherein the memory-based counter device is formed as part of a contactless near-field communication (NFC) device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2022
From: PROTON WORLD INTERNATIONAL N.V.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 061796/0130 →
Priority Claims (1)
FR 13 60440 · Oct 25, 2013 · national
Continuity (3)
Continuation 15182411 · Jun 14, 2016
Continuation 14522007 · Oct 23, 2014
Related Publication 20170229187A1 · Aug 10, 2017