IP Library Granted Patent US 10,115,728
Granted Patent B1
US 10,115,728 · App. 15/499,084 · Granted Oct 30, 2018

Laser spike annealing for solid phase epitaxy and low contact resistance in an SRAM with a shared PFET and NFET trench

Inventors: Zuoguang Liu (Schenectady, NY); Gen Tsutsui (Glenmont, NY); Heng Wu (Altamont, NY); Peng Xu (Guilderland, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L27/1104H01L21/02686H01L21/26506H01L21/324H01L21/823814H01L21/823821H01L27/0924H01L29/0847H01L29/167
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Quick Facts
Patent No.
US 10,115,728
App. No.
15/499,084
Granted
Oct 30, 2018
Kind
B1
Abstract

Embodiments are directed to a method of forming a semiconductor device and resulting structures having a shared SRAM trench and a common contact having a low contact resistance. The method includes forming a first semiconductor fin opposite a surface of a substrate and forming a second semiconductor fin opposite the surface of the substrate and adjacent to the first semiconductor fin. A doped region is formed over portions of each of the first and second semiconductor fins and a dielectric layer is formed over the doped regions. A shared trench is formed in the dielectric layer exposing portions of the doped regions. The exposed doped regions are then amorphized and recrystallized.

Claims (33)

1. A method for fabricating a semiconductor device, the method comprising:

forming a first semiconductor fin opposite a surface of a substrate;

forming a second semiconductor fin opposite the surface of the substrate and adjacent to the first semiconductor fin;

prior to forming a replacement metal gate (RMG), forming a first doped region over portions of the first semiconductor fin and a second doped region over portions of the second semiconductor fin;

forming a dielectric layer over the first and second doped regions;

after forming the RMG, forming a shared trench in the dielectric layer exposing portions of the first and second doped regions;

concurrently amorphizing the exposed first and second doped regions; and

concurrently recrystallizing the amorphized first and second doped regions.

2. The method of claim 1 , wherein the first semiconductor fin comprises n-type dopants and the second semiconductor fin comprises p-type dopants.

3. The method of claim 2 , wherein the n-type dopants are selected from the group consisting of As, P, and Sb.

4. The method of claim 2 , wherein the p-type dopants are selected from the group consisting of B, BF 2 , Al, and Ga.

5. The method of claim 1 , wherein forming the first doped region over portions of the first semiconductor fin further comprises:

forming a first epitaxy region over the first semiconductor fin; and

doping the first epitaxy region with n-type dopants.

6. The method of claim 5 , wherein forming the second doped region over portions of the second semiconductor fin further comprises:

forming a second epitaxy region over the second semiconductor fin; and

doping the second epitaxy region with p-type dopants.

7. The method of claim 1 , wherein amorphizing the exposed doped regions further comprises exposing the doped regions to a neutral element pre-amorphization ion implantation (PAI).

8. The method of claim 7 , wherein the neutral element PAI comprises Ge or Si dopants.

9. The method of claim 1 , wherein recrystallizing the amorphized doped regions further comprises exposing the doped regions to a laser spike anneal for solid phase epitaxy (LSA SPE) process.

10. The method of claim 9 , wherein the recrystallized doped regions each comprise a dopant concentration of about 7×10 20 cm −3 to about 2×10 21 cm −3 .

11. A method for fabricating a semiconductor device, the method comprising:

forming a plurality of semiconductor fins opposite a surface of a substrate;

forming an epitaxy region over each of the plurality of semiconductor fins, a first portion of the epitaxy regions comprising n-type dopants and a second portion of the epitaxy regions comprising p-type dopants, the first and second portions arranged into adjacent pairs of epitaxy regions comprising a first epitaxy region doped with n-type dopants and a second epitaxy region doped with p-type dopants;

prior to forming a replacement metal gate (RMG), forming a shared trench exposing a portion of the first and second epitaxy regions over each pair;

concurrently amorphizing the epitaxy regions; and

concurrently recrystallizing the epitaxy regions.

12. The method of claim 11 , wherein the n-type dopants are selected from the group consisting of As, P, and Sb.

13. The method of claim 11 , wherein the p-type dopants are selected from the group consisting of B, BF 2 , Al, and Ga.

14. The method of claim 11 , wherein amorphizing the epitaxy regions further comprises exposing the epitaxy regions to a neutral element pre-amorphization ion implantation (PAI).

15. The method of claim 14 , wherein the neutral element PAI comprises Ge or Si dopants.

16. The method of claim 11 , wherein recrystallizing the epitaxy regions further comprises exposing the epitaxy regions to a laser spike anneal for solid phase epitaxy (LSA SPE) process.

17. The method of claim 16 , wherein the recrystallized epitaxy regions each comprise a dopant concentration of about 7×10 20 cm −3 to about 2×10 21 cm −3 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052644/0868 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2017
From: LIU, ZUOGUANG; TSUTSUI, GEN; WU, HENG; XU, PENG
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 042164/0676 →