IP Library Granted Patent US 10,317,920
Granted Patent B2
US 10,317,920 · App. 15/503,196 · Granted Jun 11, 2019

Circuit starting method, control circuit and voltage reference

Inventor: Binbin Li (Shenzhen, CN)
Assignee: ZTE CORPORATION
G05F1/468G05F1/56G05F3/242G05F3/30
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Quick Facts
Patent No.
US 10,317,920
App. No.
15/503,196
Granted
Jun 11, 2019
Kind
B2
Abstract

A circuit starting method, a control circuit and a voltage reference circuit are provided. The control circuit includes an operational amplifier circuit and a comparison control circuit, wherein the operational amplifier circuit is arranged to establish an input reference voltage (VREF_INT) and an output reference voltage (VREF_OUT) by means of an operational amplifier (EA) and an external capacitor (C); and the comparison control circuit is arranged to, when the input reference voltage (VREF_INT) and the output reference voltage (VREF_OUT) are consistent, execute a toggle operation and output an enable signal (VREF_OK) to the operational amplifier (EA) so as to shut down the operational amplifier (EA).

Claims (28)

1. A control circuit, comprising: an operational amplifier circuit and a comparison control circuit, wherein:

the operational amplifier circuit is arranged to establish an input reference voltage and an output reference voltage by means of an operational amplifier and an external capacitor; and

the comparison control circuit is arranged to, when the input reference voltage and the output reference voltage are consistent, execute a toggle operation and output an enable signal to the operational amplifier so as to shut down the operational amplifier;

wherein the operational amplifier circuit comprises: a power supply, the operational amplifier, a transistor, the external capacitor, a bias current source, and a resistor, the transistor is a P-channel Metal Oxide Semiconductor (PMOS) tube; the power supply is connected with a power input end of the operational amplifier and a drain of the PMOS tube; an output end of the operational amplifier is connected with a gate of the PMOS tube; a source of the PMOS tube is connected with one end of the external capacitor and a positive end of the bias current source respectively; both the other end of the external capacitor and a negative end of the bias current source are grounded; the input reference voltage serves as a non-inverting input of the operational amplifier; a source voltage of the PMOS tube is the output reference voltage, and the output reference voltage serves as an inverting input of the operational amplifier; and a non-inverting input end of the operational amplifier is connected with an inverting input end of the operational amplifier via the resistor.

2. The control circuit as claimed in claim 1 , wherein the comparison control circuit is a comparator; and

the input reference voltage and output reference voltage of the operational amplifier circuit serve as inputs of the comparator, and an output of the comparator is the enable signal.

3. The control circuit as claimed in claim 2 , wherein the comparator is a comparator with a falling hysteresis.

4. A circuit starting method applied to the control circuit as claimed in claim 1 , comprising:

establishing an input reference voltage and an output reference voltage by means of an operational amplifier and an external capacitor in an operational amplifier circuit; and when the input reference voltage and the output reference voltage are consistent, executing, by a comparison control circuit, a toggle operation, and outputting, by the comparison control circuit, an enable signal to the operational amplifier so as to shut down the operational amplifier.

5. A voltage reference circuit, comprising: a voltage reference generation circuit and a control circuit for controlling the voltage reference generation circuit, the control circuit comprising an operational amplifier circuit and a comparison control circuit, wherein

the operational amplifier circuit is arranged to establish an input reference voltage and an output reference voltage by means of an operational amplifier and an external capacitor; and

the comparison control circuit is arranged to, when the input reference voltage and the output reference voltage are consistent, execute a toggle operation and output an enable signal to the operational amplifier so as to shut down the operational amplifier.

6. The voltage reference circuit as claimed in claim 5 , wherein the comparison control circuit is a comparator; and

the input reference voltage and output reference voltage of the operational amplifier circuit serve as inputs of the comparator, and an output of the comparator is the enable signal.

7. The voltage reference circuit as claimed in claim 5 , wherein the operational amplifier circuit comprises: a power supply, the operational amplifier, a transistor, the external capacitor, a bias current source, and a resistor, wherein

the transistor is a P-channel Metal Oxide Semiconductor (PMOS) tube or an N-channel Metal Oxide Semiconductor (NMOS) tube.

8. The voltage reference circuit as claimed in claim 7 , wherein when the transistor in the operational amplifier circuit is the PMOS tube,

the power supply is connected with a power input end of the operational amplifier and a drain of the PMOS tube; an output end of the operational amplifier is connected with a gate of the PMOS tube; a source of the PMOS tube is connected with one end of the external capacitor and a positive end of the bias current source respectively; both the other end of the external capacitor and a negative end of the bias current source are grounded; the input reference voltage serves as a non-inverting input of the operational amplifier; a source voltage of the PMOS tube is the output reference voltage, and the output reference voltage serves as an inverting input of the operational amplifier; and a non-inverting input end of the operational amplifier is connected with an inverting input end of the operational amplifier via the resistor.

9. The voltage reference circuit as claimed in claim 6 , wherein the comparator is a comparator with a falling hysteresis.

10. The voltage reference circuit as claimed in claim 6 , wherein the operational amplifier circuit comprises: a power supply, the operational amplifier, a transistor, the external capacitor, a bias current source, and a resistor, wherein

the transistor is a P-channel Metal Oxide Semiconductor (PMOS) tube or an N-channel Metal Oxide Semiconductor (NMOS) tube.

11. The voltage reference circuit as claimed in claim 9 , wherein the operational amplifier circuit comprises: a power supply, the operational amplifier, a transistor, the external capacitor, a bias current source, and a resistor, wherein

the transistor is a P-channel Metal Oxide Semiconductor (PMOS) tube or an N-channel Metal Oxide Semiconductor (NMOS) tube.

12. The voltage reference circuit as claimed in claim 10 , wherein when the transistor in the operational amplifier circuit is the PMOS tube,

the power supply is connected with a power input end of the operational amplifier and a drain of the PMOS tube; an output end of the operational amplifier is connected with a gate of the PMOS tube; a source of the PMOS tube is connected with one end of the external capacitor and a positive end of the bias current source respectively; both the other end of the external capacitor and a negative end of the bias current source are grounded; the input reference voltage serves as a non-inverting input of the operational amplifier; a source voltage of the PMOS tube is the output reference voltage, and the output reference voltage serves as an inverting input of the operational amplifier; and a non-inverting input end of the operational amplifier is connected with an inverting input end of the operational amplifier via the resistor.

13. The voltage reference circuit as claimed in claim 11 , wherein when the transistor in the operational amplifier circuit is the PMOS tube,

the power supply is connected with a power input end of the operational amplifier and a drain of the PMOS tube; an output end of the operational amplifier is connected with a gate of the PMOS tube; a source of the PMOS tube is connected with one end of the external capacitor and a positive end of the bias current source respectively; both the other end of the external capacitor and a negative end of the bias current source are grounded; the input reference voltage serves as a non-inverting input of the operational amplifier; a source voltage of the PMOS tube is the output reference voltage, and the output reference voltage serves as an inverting input of the operational amplifier; and a non-inverting input end of the operational amplifier is connected with an inverting input end of the operational amplifier via the resistor.

14. The circuit starting method as claimed in claim 4 , wherein when a voltage reference generation circuit is powered on by a power supply, a reference core starts to work to generate the input reference voltage VREF_INT, which serves as a non-inverting input of the operational amplifier; the output reference voltage VREF_OUT is connected to an output end of the operational amplifier, and serves as an output of the entire voltage reference generation circuit, so as to provide a reference voltage for other external circuits, wherein the operational amplifier is connected in a unit gain negative feedback form, so that voltages at two input ends of the operational amplifier are clamped to be equal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2022
From: ZTE CORPORATION
To: SANECHIPS TECHNOLOGY CO., LTD.
Reel/Frame 061983/0105 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2017
From: LI, BINBIN
To: ZTE CORPORATION
Reel/Frame 041225/0771 →
Priority Claims (1)
CN 2014 1 0404099 · Aug 15, 2014 · national
Continuity (1)
Related Publication 20170227976A1 · Aug 10, 2017