IP Library Granted Patent US 10,403,811
Granted Patent B2
US 10,403,811 · App. 15/503,680 · Granted Sep 3, 2019

Magnetic diffusion barriers and filter in PSTTM MTJ construction

Inventors: Kevin P. O'Brien (Portland, OR); Kaan Oguz (Hillsboro, OR); Brian S. Doyle (Portland, OR); Mark L. Doczy (Portland, OR); Charles C. Kuo (Hillsboro, OR); Robert S. Chau (Beaverton, OR)
Assignee: Intel Corporation
H01L43/08G11C11/161G11C11/1659H01F10/3295H01L43/02H01L43/10H01L43/12
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Quick Facts
Patent No.
US 10,403,811
App. No.
15/503,680
Granted
Sep 3, 2019
Kind
B2
Abstract

A material layer stack for a magnetic tunneling junction, the material layer stack including a fixed magnetic layer; a dielectric layer; a free magnetic layer; and an amorphous electrically-conductive seed layer, wherein the fixed magnetic layer is disposed between the dielectric layer and the seed layer. A non-volatile memory device including a material stack including an amorphous electrically-conductive seed layer; and a fixed magnetic layer juxtaposed and in contact with the seed layer. A method including forming an amorphous seed layer on a first electrode of a memory device; forming a material layer stack on the amorphous seed layer, the material stack including a dielectric layer disposed between a fixed magnetic layer and a free magnetic layer, wherein the fixed magnetic layer.

Claims (39)

1. A material layer stack for a magnetic tunneling junction, the material layer stack comprising:

a dielectric layer between a fixed magnetic layer and a free magnetic layer;

a filter layer directly on the fixed magnetic layer; and

an insertion layer adjacent the free magnetic layer, wherein the insertion layer is in direct contact with the free magnetic layer, and

wherein at least one of the insertion layer and the filter layer comprises a material having a magnetic flux density of one tesla or less.

2. The material layer stack of claim 1 , wherein the magnetic flux density of the material of the at least one of the insertion layer and the filter layer is in a range of 0.1 tesla to 1 tesla.

3. The material layer stack of claim 1 , wherein each of the insertion layer and the filter layer comprises a material having a magnetic flux density of one tesla or less.

4. The material layer stack of claim 1 , wherein the material of the at least one of the insertion layer and the filter layer is amorphous.

5. The material layer stack of claim 4 , wherein the material comprises cobalt zirconium tantalum.

6. The material layer stack of claim 1 , wherein the material of the at least one of the insertion layer and the filter layer is at least partially crystalline.

7. The material layer stack of claim 1 , wherein the material of the at least one of the insertion layer and the filter layer is an alloy.

8. The material layer stack of claim 1 , wherein a surface anisotropy between the at least one of the insertion layer and the filter layer and a magnetic layer is greater than 0.5 millijoules per square meter.

9. A nonvolatile memory device comprising:

a material stack comprising:

a dielectric layer between a fixed magnetic layer and a free magnetic layer;

a filter layer directly on the fixed magnetic layer;

an insertion layer adjacent the free magnetic layer, wherein the insertion layer is in direct contact with the free magnetic layer, and wherein at least one of the insertion layer and the filter layer comprises a material having a magnetic flux density of one tesla or less;

a first electrode disposed on a first side of the material stack;

a second electrode disposed on a second side of the material stack; and

a transistor device coupled to the first electrode or the second electrode.

10. The device of claim 9 , wherein the magnetic flux density of the material of the at least one of the insertion layer and the filter layer is in a range of 0.1 tesla to 1 tesla.

11. The device of claim 9 , wherein each of the insertion layer and the filter layer comprises a material having a magnetic flux density of one tesla or less.

12. The device of 9 , wherein the material of the at least one of the insertion layer and the filter layer is amorphous.

13. The device of claim 9 , wherein the material of the at least one of the insertion layer and the filter layer is at least partially crystalline.

14. The device of any of claim 9 , wherein the material of the at least one of the insertion layer and the filter layer is an alloy.

15. The device of any of claim 9 , wherein a surface anisotropy between the at least one of the insertion layer and the filter layer and the fixed magnetic layer and free magnetic layer is greater than 0.5 millijoules per square meter.

16. A material layer stack for a magnetic tunneling junction, the material layer stack comprising:

a dielectric layer between a fixed magnetic layer and a free magnetic layer;

a filter layer adjacent the fixed magnetic layer; and

an insertion layer adjacent the free magnetic layer, wherein the insertion layer is in direct contact with the free magnetic layer, and

wherein each of the insertion layer and the filter layer comprises a material having a magnetic flux density of one tesla or less.

17. A nonvolatile memory device comprising:

a material stack comprising:

a dielectric layer between a fixed magnetic layer and a free magnetic layer;

a filter layer adjacent the fixed magnetic layer;

an insertion layer adjacent the free magnetic layer, wherein the insertion layer is in direct contact with the free magnetic layer, and wherein each of the insertion layer and the filter layer comprises a material having a magnetic flux density of one tesla or less;

a first electrode disposed on a first side of the material stack;

a second electrode disposed on a second side of the material stack; and

a transistor device coupled to the first electrode or the second electrode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2017
From: O'BRIEN, KEVIN P.; OGUZ, KAAN; DOYLE, BRIAN S.; DOCZY, MARK L.; KUO, CHARLES C.; CHAU, ROBERT S.
To: INTEL CORPORATION
Reel/Frame 041243/0599 →
Continuity (1)
Related Publication 20170271576A1 · Sep 21, 2017