Multi-touch sensor and electrostatic pen digitizing system utilizing simultaneous functions for improved performance
Circuitry, systems, and methods are provided that can acquire touch sensor data simultaneously for different modes of, for example, self, mutual, and pen, and with simultaneous sampling of the different channels. Drive/receive circuitry and methods of driving and receiving sensor electrode signals are provided that allow digital I/O pins to be used to interface with touch sensor electrodes using external passive filter components. Drive/receive circuitry is provided employing voltage following sigma-delta A/D coverts that are adapted to both drive and sense touch sensor signals on multiple frequencies simultaneously. This circuitry may be operated in modes to sense various combinations of mutual, self, and pen touch signals simultaneously. While capacitive multi-touch sensors are preferred, the circuits and methods herein are useful with many other types of touch sensors as well.
1. Driver and receiver circuitry for a sensor, the circuitry comprising:
multiple drive/receive circuits, a drive/receive circuit of the multiple drive/receive circuits includes:
a voltage-following sigma-delta analog to digital converter (ADC) circuit that includes a first input coupled to receive a sensor drive signal, a second input coupled to an electrode of the sensor, and an output; and
a sigma-delta digital to analog converter (DAC) circuit includes a converter input and a converter output, the converter input coupled to the output of the voltage-following sigma-delta ADC circuit; and
an output filter having a filter input coupled to the converter output and a filter output coupled to the second input of the voltage-following sigma-delta ADC circuit and to the electrode of the sensor;
drive signal generation circuitry coupled to generate the sensor drive signal that includes at least one of a mutual analog sensor signal at a first frequency and a self analog sensor signal at a second frequency that is different from the first frequency; and
wherein the drive/receive circuit is configured to drive and sense the electrode in accordance with at least one of the self analog sensor signal and the mutual analog sensor signal.
2. The circuitry of claim 1 further comprising:
a digital filter coupled to the output of the voltage-following sigma-delta ADC circuit; and
demodulation circuitry coupled to the digital filter, the demodulation circuitry configured to process an output signal from the digital filter to interpret the at least one of the self analog sensor signal and the mutual analog sensor signal.
3. The circuitry of claim 2 , wherein the drive/receive circuit of the multiple drive/receive circuits is further in configured to sense a pen analog sensor signal at a third frequency that is different from the first frequency and the second frequency, and the demodulation circuitry is configured to process the output signal from the digital filter to interpret the pen analog sensor signal.
4. The circuitry of claim 1 further comprising:
a field programmable gate array (FPGA) device that includes the multiple drive/receive circuits;
the converter output of the drive/receive circuit coupled to a sensor drive pin of the FPGA device;
at least a portion of the output filter coupled to the sensor drive pin external to the FPGA; and
a digital portion of the drive/receive circuit coupled to the output of the voltage-following sigma-delta ADC circuit, the digital portion configured to detect changes in impedance of the electrode of the sensor.
5. The circuitry of claim 4 , wherein the drive/receive circuit of the multiple drive/receive circuits further comprises:
the sigma-delta DAC circuit includes a reference input and a reference output, the sigma-delta DAC circuit coupled to the second input, and the reference output coupled to a reference pin of the FPGA;
an analog filter coupled to the reference pin of the FPGA, at least a portion of the analog filter external to the FPGA;
a feedback pin of the FPGA coupled to first input of the voltage-following sigma-delta ADC circuit, the feedback pin of the FPGA externally coupled to the sensor drive pin; and
a control pin of the FPGA coupled to the second input of the voltage-following sigma-delta ADC circuit, the control pin coupled to the analog filter.
6. The circuitry of claim 4 , wherein the drive/receive circuit of the multiple drive/receive circuits further comprises:
the sigma-delta DAC circuit includes a reference input and a reference output, the reference output coupled to the second input, and the reference output also coupled to a reference pin of the FPGA;
an analog filter coupled to the reference pin of the FPGA, at least a portion of the analog filter external to the FPGA;
a feedback pin of the FPGA coupled to first input of the voltage-following sigma-delta ADC circuit, the feedback pin of the FPGA externally coupled to the sensor drive pin; and
a control pin of the FPGA coupled to the second input of the voltage-following sigma-delta ADC circuit, the control pin coupled to the analog filter.
7. The circuitry of claim 4 , wherein the drive/receive circuit of the multiple drive/receive circuits further comprises:
coupling between the second input and the converter output internal to the FPGA; and
coupling to the first input internal to the FPGA, FPGA; and
wherein the drive signal generation circuitry further comprises:
a first sigma-delta DAC circuit that includes a first reference input and a first reference output, the first reference input coupled to a source of the self analog sensor signal, and the first reference output coupled to a first multiplexor input; and
a second sigma-delta DAC circuit that includes a second reference input and a second reference output, the second reference input coupled to a source of the mutual analog sensor signal, and the second reference output coupled to a second multiplexor input.
8. The circuitry of claim 1 , wherein the drive/receive circuit of the multiple drive/receive circuits comprises a field programmable gate array (FPGA) or application specific integrated circuit (ASIC) circuitry connected to a single pin coupled to the electrode of the sensor, and external analog filter components coupled to the single pin.
9. The circuitry of claim 1 , wherein the mutual analog sensor signal includes multiple frequencies including at least the first frequency.
10. The circuitry of claim 1 , wherein the mutual analog sensor signal includes a mutually coupled capacitive sensor signal.
11. The circuitry of claim 1 , wherein the self analog sensor signal comprises multiple frequencies including at least the second frequency.
12. The circuitry of claim 1 further comprising a circuit configured to dither self analog sensor signals including the self analog sensor signal.
13. The circuitry of claim 1 , wherein the drive/receive circuit of the multiple drive/receive circuits is configured to subtract common-mode proportional noise based on the at least one of the self analog sensor signal and the mutual analog sensor signal.
14. The circuitry of claim 1 , wherein the voltage-following sigma-delta ADC circuit includes a differential ADC circuit that includes differential inputs connected to two integrated circuit pins.
15. A drive/receive circuit comprising:
a voltage-following sigma-delta analog to digital converter (ADC) circuit that includes a first input coupled to receive a sensor drive signal, a second input coupled to a sensor, and an output;
a sigma-delta digital to analog converter (DAC) circuit that includes a converter input and a converter output, the converter input coupled to the output of the voltage-following sigma-delta ADC circuit; and
an output filter having a filter input coupled to the converter output and a filter output coupled to the second input of the voltage-following sigma-delta ADC circuit and to the sensor; and
the voltage-following sigma-delta ADC being configured to generate an output signal based on the sensor drive signal received via the first input and a feedback signal coupled to the second input from the filter output.
16. The drive/receive circuit of claim 15 further comprising:
drive signal generation circuitry coupled to the first input and configured to generate a mutual analog sensor signal at one or more first frequencies; and
the drive/receive circuit is configured simultaneously to drive the mutual analog sensor signal via the sensor and to sense the mutual analog sensor signal via the sensor.
17. The drive/receive circuit of claim 16 , wherein the drive signal generation circuitry is further configured to simultaneously to generate a self analog sensor signal at one or more second frequencies different from the first frequencies; and
wherein the drive/receive circuit is further configured to drive the self analog sensor signal via the sensor and simultaneously to sense the self analog sensor signal via the sensor.
18. The drive/receive circuit of claim 16 further comprising: the drive signal generation circuitry is further configured simultaneously to generate a self analog sensor signal at one or more second frequencies different from the first frequencies;
the drive/receive circuit is further configured simultaneously to drive the self analog sensor signal via a first electrode of the sensor and to sense the self analog sensor signal via the first electrode of the sensor; and
another drive/receive circuit configured simultaneously to drive another self analog sensor signal via a second electrode of the sensor and to sense the another self analog sensor signal and the mutual analog sensor signal via the second electrode of the sensor.
19. The drive/receive circuit of claim 16 , further comprising digital filter circuitry and demodulation circuitry coupled to the output, the digital filter circuitry and the demodulation circuitry configured to process the mutual analog sensor signal.
20. The drive/receive circuit of claim 16 , wherein the mutual analog sensor signal includes a mutually coupled capacitive sensor signal.
21. The drive/receive circuit of claim 15 further comprising:
drive signal generation circuitry coupled to the first input and configured to generate a self analog sensor signal at one or more frequencies; and
the drive/receive circuit is configured simultaneously to drive the self analog sensor signal via the sensor and to sense the self analog sensor signal via the sensor.