IP Library › Granted Patent US 10,566,780
Granted Patent B2
US 10,566,780 · App. 15/518,762 · Granted Feb 18, 2020

Electronic circuit for single-event latch-up detection and protection

Inventors: Joseph Sylvester Chang (Singapore, SG); Wei Shu (Singapore, SG); Jize Jiang (Singapore, SG)
Assignee: NANYANG TECHNOLOGICAL UNIVERSITY
H02H3/10H01L27/0248H02H1/0007H02H3/08H02H3/44
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Quick Facts
Patent No.
US 10,566,780
App. No.
15/518,762
Granted
Feb 18, 2020
Kind
B2
Abstract

An electronic circuit for single-event latch-up (SEL) detection and protection of a target integrated circuit (IC) is disclosed. The circuit comprises: a first detector configured for detecting an absolute load current (i) and comparing the absolute load current (i) with a threshold current (i th ); a second detector configured for detecting a rate of change of load current (di/dt) and comparing the rate of change of load current (di/dt) with a threshold current change rate (di/dt) th ; and a determination module for triggering a power shut-down to the target IC if the absolute load current (i) exceeds the threshold current (i th ) and/or the rate of change of load current (di/dt) exceeds the threshold current change rate (di/dt) th .

Claims (27)

1. An electronic circuit for single-event latch-up (SEL) detection and protection of a target integrated circuit (IC) comprising:

a) a first detector configured for detecting an absolute load current (i) and comparing the absolute load current (i) with a threshold current (i th );

b) a second detector configured for detecting a rate of change of load current (di/dt) and comparing the rate of change of load current (di/dt) with a threshold current change rate (di/dt) th ;

c) a threshold determination unit configured for calculating the threshold current (i th ) and the threshold current change rate (di/dt) th by monitoring an actual load current and an actual rate of change of load current to determine a range indicative of normal circuit behavior and determining the threshold values based on expected maximum values for the normal operating range; and

d) a determination module for triggering a power shut-down to the target IC if at least one of the following conditions are satisfied: the absolute load current (i) exceeds the threshold current (i th ); or the rate of change of load current (di/dt) exceeds the threshold current change rate (di/dt) th .

2. The electronic circuit according to claim 1 wherein the threshold values are within a range of 1.5 to 2 times, 2 to 3 times, 3 to 4 times or 4 to 5 times the expected maximum values.

3. The electronic circuit according to claim 1 wherein the absolute load current (i) is detected by measuring the voltage (V) across a resistor R sense and dividing V by R sense .

4. The electronic circuit according to claim 1 wherein the first detector comprises a first comparator for comparing the absolute load current (i) with the threshold current (i th ).

5. The electronic circuit according to claim 1 wherein the second detector comprises a second comparator for comparing the rate of change of load current (di/dt) with the threshold current change rate (di/dt) th .

6. The electronic circuit according to claim 5 wherein the second comparator comprises a first module for comparing the absolute load current (i) with a first load current value (i th1 ) and a second module for comparing the absolute load current (i) with a second load current value (i th2 ), where i th2 >i th1 and wherein a time interval (dt) is measured between when the absolute load current (i) exceeds i th1 to when the absolute load current (i) exceeds i th2 so as to determine the rate of change of load current (di/dt).

7. The electronic circuit according to claim 6 wherein the threshold current change rate (di/dt) th is set such that di th =i th2 −i th1 and dt th =a typical time interval for the load current (i) to increase from i th1 to i th2 due to a SEL event.

8. The electronic circuit according to claim 6 wherein the threshold current i th is 10, 20, 30, 50 or 100 times greater than i th2 .

9. The electronic circuit according to claim 1 wherein a filter is employed to filter out false trigger signals caused by normal transient current.

10. The electronic circuit according to claim 1 wherein the determination module comprises one or more logic gates.

11. The electronic circuit according to claim 1 wherein the target integrated circuit (IC) is a Commercial-Off-The-Shelf (COTS) IC.

12. The electronic circuit according to claim 1 wherein the target integrated circuit (IC) is configured for a space application.

13. The electronic circuit according to claim 1 wherein the determination module triggers a power cycling stage to shut-down the target IC and subsequently resume power to the target IC after a pre-determined duration.

14. The electronic circuit according to claim 13 wherein the pre-determined duration is calculated to ensure SEL effects are completely eradicated.

15. An electronic device comprising an electronic circuit for single-event latch-up (SEL) detection and protection in accordance with claim 1 and a target integrated circuit (IC).

16. A method of single-event latch-up (SEL) detection and protection for a target integrated circuit (IC) comprising:

a) detecting an absolute load current (i);

b) calculating a threshold current (ith) by monitoring an actual load current to determine a range indicative of normal circuit behavior and determining the threshold current (ith) based on an expected maximum value for the normal operating range;

c) comparing the absolute load current (i) with the threshold current (i th );

d) detecting a rate of change of load current (di/dt);

e) calculating a threshold current change rate (di/dt)th by monitoring an actual rate of change of load current to determine a range indicative of normal circuit behavior and determining the threshold current change rate (di/dt)th based on an expected maximum value for the normal operating range;

f) comparing the rate of change of load current (di/dt) with the threshold current change rate (di/dt) th ; and

g) triggering a power shut-down to the target IC if at least one of the following conditions are satisfied: the absolute load current (i) exceeds the threshold current (i th ) or the rate of change of load current (di/dt) exceeds the threshold current change rate (di/dt) th .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2021
From: NANYANG TECHNOLOGICAL UNIVERSITY
To: ZERO ERROR SYSTEMS PTE LTD
Reel/Frame 056171/0400 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2017
From: CHANG, JOSEPH SYLVESTER; SHU, WEI; JIANG, JIZE
To: NANYANG TECHNOLOGICAL UNIVERSITY
Reel/Frame 043277/0875 →
Priority Claims (1)
SG 10201407871P · Nov 19, 2014 · national
Continuity (1)
Related Publication 20170237250A1 · Aug 17, 2017
Cited By (2)
US 12,462,850 US 12,591,002