Active matrix substrate and display panel
An active matrix substrate is provided that includes: a plurality of source lines (data lines) 15 S; a plurality of lines that intersect with the source lines 15 S, and include at least a plurality of gate lines 13 G; a gate driver (driving circuit) 11 that includes a plurality of switching elements 18 , and are connected to at least a part of the lines, so as to control potentials of the lines according to a control signal; and a plurality of pixel control elements 16 T that are provided in correspondence to a plurality of pixels that compose a display region, and are connected with the data lines 15 S and the gate lines 13 G, so as to control display of the corresponding pixels, respectively. Either the data lines 15 S or the gate lines 13 G are vertical lines while the others are horizontal lines, and intervals of the horizontal lines are irregular intervals. At least a part of the switching elements 18 are arranged in areas that are between the pixels adjacent in the vertical direction, and where none of the pixel control elements 16 T is arranged.
1. An active matrix substrate comprising:
a plurality of data lines;
a plurality of lines that intersect with the data lines, and include at least a plurality of gate lines;
a driving circuit that includes a plurality of switching elements, and is connected to at least a part of the lines, so as to control potentials of the lines according to a control signal supplied from outside a display region;
a driver line that is connected to the driving circuit to supply the control signal to the driving circuit; and
a plurality of pixel control elements that are provided in correspondence to a plurality of pixels that are arranged in the display region, and are connected with the data lines and the gate lines, so as to control display of the corresponding pixels, respectively,
wherein the gate lines are a plurality of vertical lines that extend in a vertical direction in plan view, and the data lines are a plurality of horizontal lines that extend in a horizontal direction in plan view,
the driver line is arranged in parallel with the data lines,
intervals of the horizontal lines are irregular intervals,
at least a part of the switching elements are arranged in areas that are between the pixels adjacent in the vertical direction in plan view, and where none of the pixel control elements is arranged, and
the pixel control elements that are arranged in a plurality of pixels adjacent in the vertical direction are disposed at irregular intervals.
2. The active matrix substrate according to claim 1 ,
wherein, among the pixel control elements, a part of the pixel control elements connected with one same vertical lines are arranged on one side with respect to the respective horizontal lines to which the pixel control elements are connected, the side being different from a side on which the other pixel control elements connected with the same vertical lines are arranged.
3. The active matrix substrate according to claim 1 ,
wherein, among the pixel control elements, all of the pixel control elements connected with one same vertical lines are arranged on the same side with respect to the respective horizontal lines to which the pixel control elements concerned are connected.
4. The active matrix substrate according to claim 1 ,
wherein a drain pad of each pixel control element is formed in a layer different in a lamination direction from a gate layer that forms the gate lines, and
in the gate layer, a region is provided for preventing an area of overlap between the drain pad and the gate layer from changing in a case where the drain pad and the gate layer are displaced from each other.
5. A display panel comprising:
the active matrix substrate according to claim 1 ;
a counter substrate including a color filter and a counter electrode; and
a liquid crystal layer interposed between the active matrix substrate and the counter substrate.
6. The active matrix substrate according to claim 1 ,
wherein at least a part of the switching elements are arranged in light-shielding areas that are between display areas adjacent in the vertical direction in plan view.