IP Library › Granted Patent US 10,304,675
Granted Patent B2
US 10,304,675 · App. 15/531,237 · Granted May 28, 2019

System for integrating preceding steps and subsequent steps

Inventors: Michihiro Inoue (Tsukuba, JP); Shiro Hara (Tsukuba, JP); Fumito Imura (Tsukuba, JP); Arami Saruwatari (Tosu, JP); Sommawan Khumpuang (Tsukuba, JP)
Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
H01L21/02H01L21/6734H01L21/6773H01L21/67736H01L24/19H01L24/20H01L23/544H01L2223/54426H01L2223/54453H01L2224/04105H01L2224/12105H01L2224/2919H01L2224/32225H01L2224/32245H01L2224/73267H01L2224/92244
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Quick Facts
Patent No.
US 10,304,675
App. No.
15/531,237
Granted
May 28, 2019
Kind
B2
Abstract

A semiconductor manufacturing system has a series of steps, from manufacturing of a semiconductor on a wafer until packaging, that can be easily linked. A semiconductor chip manufacturing device manufactures a semiconductor chip, and a semiconductor packaging device packages the semiconductor chip by attaching the semiconductor chip to a package substrate which is larger than the wafer. The semiconductor chip manufacturing device includes a PLAD system for loading the wafer into and out of the semiconductor chip manufacturing device through a shuttle which is capable of housing the wafer. The semiconductor packaging device includes a PLAD system capable of loading the package substrate into and out of the semiconductor packaging device through a shuttle which is capable of housing the package substrate. The shuttles have container bodies of a same shape.

Claims (15)

1. A semiconductor manufacturing system, comprising:

a semiconductor chip manufacturing device for manufacturing a semiconductor chip in which a semiconductor is manufactured on a wafer; and

a semiconductor packaging device that packages the semiconductor chip manufactured by the semiconductor chip manufacturing device by attaching the semiconductor chip to a substrate which is larger than the wafer,

wherein the semiconductor chip manufacturing device includes a first loading in/out mechanism that loads the wafer into and out of the semiconductor chip manufacturing device through a first conveyance container that is capable of housing the wafer,

the semiconductor packaging device includes a second loading in/out mechanism that loads the substrate into and out of the semiconductor packaging device through a second conveyance container that is capable of housing the substrate, the second loading in/out mechanism having a configuration same to that of the first loading in/out mechanism,

the first conveyance container includes a first container body and a first holding section that is arranged within the first container body and holds the wafer,

the second conveyance container includes a second container body and a second holding section that is arranged within the second container body and holds the semiconductor chip and the substrate,

the first conveyance container and the second conveyance container have the first container body and the second container body of a same shape, and

the first conveyance container and the second conveyance container are same in the outside diameter dimension and are different only in the internal shape.

2. The semiconductor manufacturing system according to claim 1 , wherein

the wafer and the semiconductor chip are of a disk shape having 12.5 mm outside diameter, and the substrate is of a disk shape having 13.5 mm outside diameter.

3. The semiconductor manufacturing system according to claim 1 , wherein

the shape of the first conveyance container and the second conveyance container is different only in the shape of the first holding section and the second holding section.

4. The semiconductor manufacturing system according to claim 3 , wherein

the wafer and the semiconductor chip are of a disk shape having 12.5 mm outside diameter, and the substrate is of a disk shape having 13.5 mm outside diameter.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2018
From: INOUE, MICHIHIRO; HARA, SHIRO; IMURA, FUMITO; SARUWATARI, ARAMI; KHUMPUANG, SOMMAWAN
To: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
Reel/Frame 045458/0258 →
Priority Claims (1)
JP 2014-240531 · Nov 27, 2014 · national
Continuity (1)
Related Publication 20170330741A1 · Nov 16, 2017