IP Library Granted Patent US 10,474,796
Granted Patent B2
US 10,474,796 · App. 15/543,157 · Granted Nov 12, 2019

Method of writing data to a memory device and reading data from the memory device

Inventor: Ciprian-Leonard Pitu (Brasov, RO)
Assignee: Siemens Aktiengesellschaft
G06F21/14G06F12/1408G06F21/123G06F21/75G09C1/00H04L9/3278H04L2209/12
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Quick Facts
Patent No.
US 10,474,796
App. No.
15/543,157
Granted
Nov 12, 2019
Kind
B2
Abstract

A method of writing data to a memory device and reading data from the memory device includes issuing a challenge to a PUF device during a power-up process in order to derive a PUF response, error correcting the PUF response, providing delinearized addresses via a delinearization algorithm to the memory device using the error corrected PUF response, masking data, which is written to the memory device, via a masking module using the error corrected PUF response, de-masking data, which is read from the memory device, via the masking module ( 19 ) using the error corrected PUF response; and performing a check-sum verification of read data such that address delinearization and data masking are used together to obfuscate the memory content.

Claims (29)

1. A method of writing data to a memory device and reading data from the memory device, comprising:

issuing a challenge to a Physical Unclonable Function (PUF) device during a power-up process to derive a PUF response;

error correcting the PUF response;

providing delinearized addresses via a delinearization algorithm to the memory device using the error corrected PUF response;

masking data, which is written to the memory device, via a masking module using the error corrected PUF response during a write operation;

de-masking data, which is read from the memory device, via the masking module using the error corrected PUF response during a read operation; and

performing a check-sum verification of read data.

2. The method of claim 1 , wherein the check-sum verification is performed by using a cyclic error-correcting code.

3. The method of claim 2 , further comprising:

generating a reset signal in case of data falsification to reset a processor which interacts with the memory device.

4. The method of claim 2 , wherein the data is masked with the error corrected PUF response using an XOR operator; and wherein the data is revealed out of masked data with the error corrected PUF response using the XOR operator.

5. The method of claim 1 , further comprising:

generating a reset signal in case of data falsification to reset a processor which interacts with the memory device.

6. The method of claim 5 , wherein the data is masked with the error corrected PUF response using an XOR operator; and wherein the data is revealed out of masked data with the error corrected PUF response using the XOR operator.

7. The method of claim 1 , wherein the data is masked with the error corrected PUF response using an XOR operator; and wherein the data is revealed out of masked data with the error corrected PUF response using the XOR operator.

8. The method of claim 1 , wherein the PUF device utilizes silicon physical unclonable functions of a system on chip which comprises a processor and a memory controller.

9. A system on chip comprising:

a processor;

a memory controller; and

a memory obfuscation module which is connected to a data bus and an address bus and is connected between the memory controller and memory devices;

wherein the memory obfuscation module is configured to:

issue a challenge to a Physical Unclonable Function (PUF) device during a power-up process to derive a PUF response;

error correct the PUF response;

provide delinearized addresses via a delinearization algorithm to a memory device using the error corrected PUF response;

mask data, which is written to the memory device, via a masking module using the error corrected PUF response;

de-mask data, which is read from the memory device, via the masking module using the error corrected PUF response; and

performing a check-sum verification of read data.

10. The system of claim 9 , wherein the obfuscation module comprises the PUF device, an address delinearization module and a data masking module.

11. The system of claim 10 , wherein the obfuscation module comprises an error correction module connected to the PUF device.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2017
From: SIEMENS S.R.L.
To: SIEMENS AG ÖSTERREICH
Reel/Frame 043605/0997 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2017
From: SIEMENS AG ÖSTERREICH
To: SIEMENS AKTIENGESELLSCHAFT
Reel/Frame 043606/0043 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2017
From: PITU, CIPRIAN-LEONARD
To: SIEMENS S.R.L.
Reel/Frame 043867/0755 →
Priority Claims (1)
EP 15464002 · Jan 15, 2015 · regional
Continuity (1)
Related Publication 20180011995A1 · Jan 11, 2018
Cited By (1)
US 12,724,905