Semiconductor wafer comprising a monocrystalline group-IIIA nitride layer
Problems associated with the mismatch between a silicon substrate and a group-IIIA nitride layer are addressed by employing a silicon substrate processed to have a surface comprising closely spaced tips extending from the surface, depositing a group-IIIB silicide layer on the tips, then depositing a group-IIIB nitride layer, and then depositing a group-IIIA nitride.
1. A semiconductor wafer, comprising:
a monocrystalline silicon substrate wafer having a top surface, the monocrystalline substrate wafer structured to have a multiplicity of tips on its top surface,
each of the tips covered, in the order given, with a group-IIIB silicide layer having a thickness of not less than 5 nm, and a group-IIIB nitride layer, and
the group-IIIB nitride layer covered with a monocrystalline group-IIIA nitride layer.
2. The semiconductor wafer of claim 1 , wherein a contact area between the group-IIIB nitride layer and the monocrystalline group-IIIA nitride layer is not more than 50% of the group-IIIA nitride layer, in the case of a coalesced film.
3. The semiconductor wafer of claim 1 , wherein the tips have a height between 100 nm and 50 μm.
4. The semiconductor wafer of claim 1 , wherein the tips have a height between at least 3 μm and 50 μm.
5. The semiconductor wafer of claim 1 , wherein the tips have a bottom width of between 1 nm and 10 μm.
6. The semiconductor wafer of claim 1 , wherein the tips have a center-to-center distance between 100 nm and 10 μm.
7. The semiconductor wafer of claim 1 , wherein the tips have a center-to-center distance between 100 nm and at most 3 μm.
8. The semiconductor wafer of claim 1 , wherein the group-IIIB nitride layer has a (111) surface orientation.
9. The semiconductor wafer of claim 1 , wherein the group-IIIB nitride layer comprises either a single layer of ScN or YN, or a double layer of ScN and YN, or a multiple mixed or graded layer of Y 1−x Sc x N with 0≤x≤1.
10. The semiconductor wafer of claim 1 , wherein the group-IIIB nitride layer has a (111) surface orientation and comprises either a single layer of ScN or YN, or a double layer of ScN and YN, or a multiple mixed or graded layer of Y 1−x Sc x N with 0≤x≤1.
11. The semiconductor wafer of claim 1 , wherein the silicide layer has a (0001) surface orientation.
12. The semiconductor wafer of claim 1 , wherein the silicide layer is a Y 1−z Sc z Si x with 0≤z≤1.
13. The semiconductor wafer of claim 11 , wherein the silicide layer is a Y 1−z Sc z Si x with 0≤z≤1.
14. The semiconductor wafer of claim 1 , wherein the monocrystalline group-IIIA nitride layer is a coalesced film or a structured layer.
15. The semiconductor wafer of claim 1 , wherein the monocrystalline group-IIIA nitride layer is structured layer comprising an array of rods, blocks, tips or pyramids.
16. The semiconductor wafer of claim 1 , wherein the monocrystalline group-IIIA nitride layer is a monocrystalline In x Al z Ga 1−(x+z) N layer with 0≤x, z, and (x+z)≤1.
17. The semiconductor wafer of claim 1 , wherein the monocrystalline group-IIIA nitride layer has a (0001) surface orientation.
18. The semiconductor wafer of claim 1 , the monocrystalline substrate wafer is a Si(111) or Si(001) wafer.
19. In a process for producing light emitting elements, field effect transistors, or microstructure printing wherein a substrate is employed, the improvement comprising employing a semiconductor wafer of claim 1 or a portion thereof in the process as a substrate.
20. A method for producing a semiconductor wafer of claim 1 , comprising the steps of:
providing a monocrystalline substrate wafer,
structuring the substrate wafer to form tips on its top surface,
covering the tips, in the order given, with a group-IIIB silicide layer having a thickness of not less than 5 nm and with a group-IIIB nitride layer, and
covering the group-IIIB nitride layer with a monocrystalline group-IIIA nitride layer.
21. The method of claim 20 , wherein the step of covering the tips with a group-IIIB silicide layer and then with a group-IIIB nitride layer comprises forming the group-IIIB silicide layer by a silicidation process.
22. The method according to claim 21 , wherein the step of covering the tips with a group-IIIB silicide layer and then with a group-IIIB nitride layer comprises depositing a group-IIIB nitride on top of a group-IIIB silicide by in situ nitridation of a group-IIIB silicide surface, or by molecular beam epitaxy.